Command Block Registers - Fujitsu MHA2021AT Product Manual

Interface

5.2.2 Command block registers

(1) Data register (X'1F0')
The Data register is a 16-bit register for data block transfer between the device
and the host system. Data transfer mode is PIO or LBA mode.
(2) Error register (X'1F1')
The Error register indicates the status of the command executed by the device.
The contents of this register are valid when the ERR bit of the Status register is 1.
This register contains a diagnostic code after power is turned on, a reset , or the
EXECUTIVE DEVICE DIAGNOSTIC command is executed.
[Status at the completion of command execution other than diagnostic command]
Bit 7
ICRC
X: Unused
- Bit 7:
- Bit 6:
- Bit 5:
- Bit 4:
- Bit 3:
- Bit 2:
- Bit 1:
- Bit 0:
5-8
Bit 6 Bit 5 Bit 4
UNC X IDNF
Interface CRC Error (ICRC). This bit indicates that a CRC error
occurred during Ultra DMA transfer.
Uncorrectable Data Error (UNC). This bit indicates that an
uncorrectable data error has been encountered.
Unused
ID Not Found (IDNF). This bit indicates an error except for bad
sector, uncorrectable error and SB not found.
Unused
Aborted Command (ABRT). This bit indicates that the requested
command was aborted due to a device status error (e.g. Not Ready,
Write Fault) or the command code was invalid.
Track 0 Not Found (TK0NF). This bit indicates that track 0 was not
found during RECALIBRATE command execution.
Address Mark Not Found (AMNF). This bit indicates that the SB Not
Found error occurred.
Bit 3 Bit 2 Bit 1
X ABRT TK0NF
C141-E042-01EN
Bit 0
X