Write Circuit; Table 4.2 Write Precompensation Algorithm - Fujitsu MHA2021AT Product Manual

Theory of Device Operation
signal (WUS) when a write error occurs due to head short-circuit or head
disconnection.

4.6.2 Write circuit

The write data is output from the hard disk controller (HDC) with the NRZ data
format, and sent to the encoder circuit in the RDC with synchronizing with the
write clock. The NRZ write data is converted from 8-bit data to 9-bit data by the
encoder circuit then sent to the PreAMP, and the data is written onto the media.
(1) 8/9 GCR
The disk drive converts data using the 8/9 (0, 4, 4) group coded recording (GCR)
algorithm. This code format is 0 to 4 code bit "0"s are placed between "1"s.
(2) Write precompensation
Write precompensation compensates, during a write process, for write non-
leneartiry generated at reading. Table 4.2 shows the write precompensation
algorithm.

Table 4.2 Write precompensation algorithm

Bit
n – 1
0
1
1
Late: Bit n is time shifted (delayed) from its nominal time position towards the
bit n+1 time position.
4-10
Bit Bit
n n + 1
1 1
1 0
1 1
Compensation
Bit n
None
Late
Late
C141-E042-01EN