Table of Contents General Information about DCF77 ..........5 Overview ..................6 Configuration ................7 Setting the Base Address ..........7 Selecting the I/O Access Mode ........8 Installation ................... 8 Interface Description ..............8 Address Map ..............9 Using Periodic Interrupts ..........10 Interrupt Vector ..........
General Information about DCF77 The radio remote clocks made by Meinberg receive the signal from the long wave transmitter DCF77. This long wave transmitter installed in Mainflingen near Frank- furt/Germany transmits the reference time of the Federal Republic of Germany. This time reference is either the Central European Time (Mitteleuropäische Zeit, MEZ) or...
Overview The radio remote clock DCF77 VME31 receives the time marks from DCF77 and makes the decoded time available to VME bus systems. The clock is designed on a 3U board (euro card size), so it can be used in either 3U systems or 6U systems. An external ferrit antenna passes the signal from DCF77 to the on-board long wave receiver.
Configuration Before the board can be installed in the VME bus rack, some jumpers must be configured as described below. The location of the jumpers can be seen from the component layout at the end of this manual. Setting the Base Address The base address of the dual port RAM on the board must be configured correspon- ding to the table shown below:...
Selecting the I/O Access Mode An additional jumper J1 must be configured to select the access mode: if the jumper is installed, the board can be accessed using Short Supervisor I/O (2Dh), otherwise the board is accessed using Short Non-Priviledged I/O (29h). Installation After the jumpers have been configured, the board can be installed in the VME bus rack.
method is to read the clock interrupt driven or poll the 100th-of-seconds until the value changes: in both of the cases, the software has an interval of 10ms to read the desired data. Address Map The VME31 radio remote clock has a A16:D8 bus interface, so the dual port RAM must be accessed byte wide on odd address offsets related to the base address.
Using Periodic Interrupts If the clock shall generate periodic interrupts, three bytes must be written to the dual port RAM: Interrupt Vector After power up, this byte is set to 0Fh. The user must take care to set up the vector number corresponding to the system's exception vector assignments.
Technical Specifications RECEIVER: Narrow bandwidth receiver with automatic gain control Bandwidth: approx. 40Hz ANTENNA: Active external ferrite antenna in a plastic case Length of the cable: up to more than 100m Standard: SMB type connector, 5m of RG174 cable Outdoor: N type connector, RG58 cable, adapter RG58/RG174 DISPLAY: eight digit LED display shows date or time (selectable by...
SYSTEM BUS INTERFACE: VME bus A16:D8, slave Access: Short Supervisor I/O (2Dh) Short Non-priviledged I/O (29h) IRQ levels: 1..7, programmable DATA FORMAT: packed BCD PERIODIC INTERRUPTS: none, 10ms, 100ms, 1s, 10s, 1min, 10min, or 1h POWER REQUIREMENT: +5V @ 320mA PHYSICAL DIMENSION: 3U Euro card, 6U front panel optional...
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