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A.2 Why Use an Interrupt Status Port (ISP)?
The answer to the polling inefficiency was the Interrupt Status Port (ISP). The ISP
is a read-only 8-bit register that sets a corresponding bit when an interrupt is
pending. Port 1's interrupt line corresponds with bit D0 of the status port, Port 2's
with D1, etc. The use of this port means that the software designer now only has to
poll a single port to determine if an interrupt is pending.
The ISP is at "base+7" on each port. For example, if the base = 280 hex, the
status port = 287 hex, 28F hex, and so on. The Adapter will allow any one of the
available locations to be read to obtain the value in the status register. Both status
ports on the Adapter are identical, so either one can be read.
Example: This indicates that Channel 2 has an interrupt pending:
Bit Position:
7
Value Read:
0
6
5
4
0
0
0
APPENDIX A: Interrupt Handling
3
2
0
0
1
0
1
0
25
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