IEE 03858-21-0105 Reference Manual page 4

Pole display
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Figure
Figure 1
Module Block Diagram ...........................................................................................................................6
Figure 2
LCD Controller Block Diagram ..............................................................................................................7
Figure 3
Correspondence Between Character Codes and Character Patterns .................................................8
Figure 4
Relationship Between CG RAM Address, Character Codes (DD RAM) and Character Patterns (CG
RAM Data)........................................................................................................................................9
Figure 5
LCD Controller Instruction Set.............................................................................................................10
Figure 6
Initial Conditions on Power Up .............................................................................................................11
Figure 7
Display Shift Left from Initial Conditions ..............................................................................................11
Figure 8
Display Shift Right from Initial Conditions ............................................................................................11
Figure 9
Load Character with S=1, I/D=0 from Initial Conditions ......................................................................11
Figure 10 Load Character with S=1, I/D=1 from Initial Conditions ......................................................................11
Figure 11 Interface Timing (Write) .......................................................................................................................11
Figure 12 Interface Timing (Read) .......................................................................................................................11
Figure 13 Busy Flag Check Sequence for 8–bit Parallel Interface......................................................................11
Figure 14 Busy Flag Check Sequence for 4–bit Parallel Interface......................................................................11
Figure 15 Definition of Vertical Viewing Angle......................................................................................................11
Figure 16 Definition of Horizontal Viewing Angle..................................................................................................11
Figure 17 Definition of Contrast Ratio (CR).........................................................................................................11
Figure 18 Definition of Optical Response............................................................................................................11
Figure 19 Initial Brightness vs. Voltage ................................................................................................................11
Figure 20 Initial Brightness vs. Frequency...........................................................................................................11
Figure 21 Brightness vs. Time.............................................................................................................................11
Figure 22 03858–21–0105 Outline Drawing ........................................................................................................11
Industrial Electronic Engineers, Inc.
Van Nuys, California
List of Figures
Title
SIZE
CODE IDENT NO.
A
05464
Scale: NONE
S03858–21–0105
Rev
B
Sheet 4
Page

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