Chip Configuration - Asus CUA User Manual

4.4.1 Chip Configuration

(scroll down to see more items, as shown here)
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–4, depending on the memory mod-
ules that you are using. Default setting is [By SPD], which configures items
2–4 by reading the contents in the SPD (Serial Presence Detect) device. The
EEPROM on the memory module stores critical parameter information about
the module, such as memory type, size, speed, voltage interface, and mod-
ule banks. Configuration options: [User Define] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
NOTE: To make changes to the following three field, the SDRAM Con-
figuration field must be set to [User Define].
SDRAM CAS Latency (tCL) [2T]
This controls the latency between the SDRAM read command and the time
that the data actually becomes available. Configuration options: [2T] [3T]
SDRAM RAS to CAS Delay (tRCD) [2T]
This controls the latency between the SDRAM active command and the
read/write command. Configuration options: [2T] [3T]
SDRAM RAS Precharge Time (tRP) [2T]
This controls the idle clocks after issuing a precharge command to the
SDRAM. Configuration options:
SDRAM Cycle Time (tRAS) [6T]
This feature controls the number of SDRAM clocks used per access cycle.
Configuration options: [7T] [6T]
4. BIOS SETUP
[2T] [3T]
Test
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