Real-Time Clock, Cmos Sram, And Battery - Intel D845HV Technical Product Specification

Hide thumbs Also See for D845HV:
Table of Contents

Advertisement

Intel Desktop Board D845HV/D845WN Technical Product Specification
The D845HV and D845WN boards support Laser Servo (LS-120) diskette technology through the
IDE interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program's Boot menu to one of the following:
ARMD-FDD (ATAPI removable media device – floppy disk drive)
ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about
The location of the IDE connectors
The signal names of the IDE connectors
BIOS Setup program's Boot menu
1.8.3.2
SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about
The location of the SCSI hard drive activity LED connector
The signal names of the SCSI hard drive activity LED connector

1.8.4 Real-Time Clock, CMOS SRAM, and Battery

The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features.
The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are
reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
For information about
Proper date access in systems with D845HV and D845WN boards
28
13 minutes/year at 25 ºC with 3.3 VSB applied.
Refer to
Figure 13, page 61
Table 39, page 67
Table 75, page 113
Refer to
Figure 13, page 61, or
Figure 14, page 62
Table 40, page 67
Refer to
Section 1.3, page 17

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents