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Ebyte ECK30-T13IA User Manual
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Ebyte ECK30-T13IA User Manual

Ebyte ECK30-T13IA User Manual

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User Manual
ECK30-T13IA Core Board
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Summary of Contents for Ebyte ECK30-T13IA

  • Page 1 User Manual ECK30-T13IA Core Board...
  • Page 2 6.11. Analog audio interface ......................30 6.12. RTC ............................32 6.13. Digital Audio Interface ......................32 6.14. UART Interface ........................33 6.15. SPI interface ........................... 33 6.16. I2C Interface ...........................34 6.17. CAN interface ........................34 Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 3 8. Structural dimensions ........................37 9. Welding Instructions ........................38 9.1. Reflow temperature ........................38 9.2. Reflow Oven Profile ........................ 39 10. Reference Documentation ......................39 11. Revision Notes ..........................40 12. Contact Us ...........................40 Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 4 No license to any intellectual property, whether express or implied, by estoppel or otherwise, is granted by this document. The test data obtained in this article are all obtained by Ebyte Laboratory testing, and the actual resu lts may be slightly different.
  • Page 5 UART, 2 CAN, etc., and also provides rich analog I/O functions such as analog video, analog audio, AD C, etc. The ECK30-T13IA series core board includes 3 specific product models, all of which are designed w ith domestically produced industrial-grade devices. They mainly differ in memory capacity, storage configur ation, etc.
  • Page 6 11、2-way SPI, 1 way is led out to the stamp hole ; 12、6-channel UART, maximum baud rate 4Mbps; 13、8-channel PWM, maximum output frequency 24/100MHz, support PWM output and input captur Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 7 25、Power supply: single-channel DC +5V±10%@0.5A power input; 26、Size: 45×35×3.6mm, as shown in the figure below: Dimensions 27、Working temperature: Industrial grade: -40℃-85℃; 28、PCB technology: 8-layer board design, immersion gold, lead-free technology; Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 8 Industrial control motherboard;  Robots and drones.  2. Product Selection 2.1.Model configuration The ECK30-T13IA series core board selection and configuration table is as follows: Product Selection and Configuration Table Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 9 I/O into the functions they need. The following table lists the main function parameters of the ECK30-T13IA series core board integrat ed on the board, and the function parameters of the reusable I/O resources. The description of each I/O f...
  • Page 10 6- bit A/D converter, sampling frequency up to 2KHz , supports hold key and general key; LEDC Supports 1024 LED serial connections, LED data transmission rate up to 800Kbps ; Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 11 Grade Industrial -40℃ ~ 85℃; Grade Storage -40℃ ~ 85℃; temperature Operating 5~95% humidity, non-condensing; humidity Storage 60℃@95% humidity, non-condensing; humidity 4.3.I/O Features 4.3.1. I/O Pin Definition Pin numbering diagram Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 12 33Ω in series PF5_E2 3.3V 1131.95 PF3_D1 3.3V 1130.76 PF4_E3 3.3V 1124.16 DGND PE12_R5 3.3V 1117.23 PE13_R4 3.3V 1011.36 PE4_T2 3.3V 1010.35 PE5_T3 3.3V 1012.91 PE6_R1 3.3V 1010.38 PE7_R2 3.3V 1011.52 Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 13 3.3V 1034.18 PD5_U18 3.3V 1037.15 PD6_T19 3.3V 1031.65 PD7_T18 3.3V 1031.69 PD8_R20 3.3V 1017.22 PD9_R19 3.3V 1019.47 DGND PD10_T17 3.3V 1018.78 PD11_R17 3.3V 1018.77 PD12_P19 3.3V 1017.67 PD13_P18 3.3V 1018.78 Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 14 AUGND AGND LINEOUTRP_B14 LINEOUTRN_C14 LINEOUTLP_B15 LINEOUTLN_C15 HBIAS_E17 HP_DET_A13 HPOUTR_D13 HPOUTFB_E13 HPOUTL_F13 DGND TVOUT0_E19 TVIN1_C9 TVIN0_B9 DGND LRADC_B12 51KΩ pull up GPADC0_C13 GPADC1_B13 TP_X1_C12 1nF pull down TP_X2_A11 1nF pull down Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 15  I/O: digital input and output;  PWR: power supply;  The unit of trace length is mil;  For detailed stamp hole pin multiplexing functions, please refer to the "ECK30-T13IA Pin L ist" file. 4.3.2. I/O Impedance Control All high-speed signals of the ECK30-T13IA series core board have impedance control and length con trol during PCB design.
  • Page 16 TPADC, IR TX&RX, etc. In addition, T113-i can be connected to other different peripheral devices such as WiFi and Bluetooth through SDIO and UART. The functional block diagram of T113-i processor is s Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 17 32 KB I - cache + 32 KB D - cache ; HiFi4 DSP, 600MHz; 32 KB L1 I - cache and 32 KB L1 D - cache ; 64 KB I - ram and 64 KB D - ram ; Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 18 ECK30-T13IA User Manual V1.2 5.2.Memory The ECK30-T13IA series core board has a DDR3 SDRAM memory chip mounted on the board. It is designed with a 16-bit memory data width and has three optional capacities: 256MB/512MB/1GB. The d esigned memory uses domestic industrial-grade devices. The memory chip model is shown in Table below.
  • Page 19 F2/PC0 and F1/PC1 respectively, and light up when the high level is on. 5.6.power supply ECK30-T13IA series core board adopts a separate power supply solution and is designed in strict acc ordance with the voltage, power and timing requirements in the T113-i manual. The ECK30-T13IA series core board is powered by a single DC +5V power supply.
  • Page 20 AUGND single point grounding schematic diagram the ECK30-T13IA series core board are very simple. The main power domains are only VIN, VIO a nd VCORE. Among them, VCORE is only related to the processor and has nothing to do with the user I /O interface.
  • Page 21 , timing design and other factors of the power supply. The ECK30-T13IA series core board adopts a single power suppl y solution and provides power timing management signals to simplify the user's baseboard power design a s much as possible.
  • Page 22 -on timing of the baseboard I/O interface. 6.1.3. Power Control All external I/O interfaces of the ECK30-T13IA series core board belong to the VIO power domain. The baseboard can use the VDD_3V3_SOM or VDD_1V8_SOM power output by the core board as the c ontrol signal of the baseboard I/O interface power domain.
  • Page 23 SMHC0 => eMMC2 => Other media PC5 and PC4 of ECK30-T13IA series core board are not led out to the stamp hole. The core board has configured the boot sequence, and no user baseboard configuration is required. All ECK30-T13IA seri es core board configurations start from SMHC0 first, and the subsequent enumeration order varies accordi ng to the different storage methods on the board, as shown in the table above.
  • Page 24 The reset signal is a sensitive signal and can be processed in a package or away from signals  with greater interference ; Place the reset signal TVS tube as close to the button as possible.  Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 25 1.8V 6.5.Display output interface The ECK30-T13IA series core board supports RGB888 (RGB666), dual-channel LVDS (multiplexed w ith RGB interface pins), MIPI DSI (multiplexed with RGB interface pins), and SPI (DBI) display interfac es. If only one set of LVDS is used on the PD I/O, the other PD I/Os can be used as normal I/Os.
  • Page 26 I2C and GPIO external interrupt functions can also be used t o connect the touch screen. Ebyte's LCD touch screen module can be used in conjunction with it. For det ailed module information, please refer to the official website https://www.ebyte.com/.
  • Page 27 ± 25 mil and a signal line spacing of at least 2W. 6.6.Digital camera interface the ECK30-T13IA series core board supports 8-bit DVP interface, BT656 interface and BT601 interfa ce input. The parallel CSI interface can support a maximum pixel clock of 148.5MHz. The BT656 interfa ce can support 2*1080p@30fps input in clock double-edge sampling mode.
  • Page 28 WiFi modules. SMHC2 complies with the Multimedia Card v5.0 protocol and is usually used to connect to eMMC storage chips. The ECK30-T13IA series core uses SMHC2 to expand the on-board eMMC storage chip. It is recommended that the basebo ard use SMHC0 to connect to the SD card.
  • Page 29 6.7.3. LAYOUT SUGGESTIONS signal in the core board is controlled according to the single-ended 50Ω±10% impedance, and t  he impedance control of the baseboard is recommended to be consistent; Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 30  6.8.USB interface The ECK30-T13IA series core board supports 2 USB2.0 interfaces. USB0 supports HOST and Device modes, and USB1 only supports HOST mode. If the user uses the USB OTG function, the USB interface is recommended to use the MICRO USB...
  • Page 31 45 connector, as shown in the figure below. RJ45 Ethernet components The ECK30-T13IA series core board does not have an Ethernet PHY circuit designed in it. If the us er uses the Ethernet function, the PHY interface chip circuit needs to be designed on the baseboard. The baseboard PHY interface chip circuit design can refer to the Ebyte single-board computer product drawing 6.9.1.
  • Page 32  6.10.CVBS interface ECK30-T13IA core board provides 2 CVBS analog video inputs and 1 CVBS analog video output. Y ou only need to place a small amount of filtering, matching and protection circuits on the bottom board t o realize the analog video input and output interface functions.
  • Page 33 13IA core board leads to 2 analog audio output interfaces (LINEOUT, HPOUT) and 5 analog audio input interfaces (MICIN*3, FMIN, LINEIN). The ECK30-T13iA core board supports headphone and microphone insertion detection. Check the inse rtion of the earphones through HP_DET signal and whether the earphones have microphone function throu gh MIC_DET signal.
  • Page 34 FMINL_B17 LINEINR_C16 LINEINL_B16 AUGND AGND Audio analog signal ground MBIAS_E16 Microphone bias voltage MIC_DET_A17 Microphone insertion detection MICIN1P_D20 MICIN1N_D19 MICIN2P_E15 MICIN2N_D15 MICIN3P_D17 MICIN3N_D16 AUGND AGND Audio analog signal ground LINEOUTRP_B14 Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 35 Analog signal routing should be kept away from interference and can be wrapped with ground.  6.12.RTC ECK30-T13IA core board . If the user needs this RTC function, it can be expanded on the baseboar d through the I2C bus. 6.12.1. References RTC reference circuit diagram 6.13.Digital Audio Interface...
  • Page 36 ECK30-T13IA User Manual V1.2 6.14.UART Interface The ECK30-T13IA core board supports up to 6 asynchronous serial ports and a baud rate of up to 4 Mbps. The core board uses UART 0 as the debug serial port by default. 6.14.1. References For debugging convenience, the debug serial port can be brought out as a USB interface through a USB-to-serial port chip on the baseboard.
  • Page 37 ECK30-T13IA User Manual V1.2 6.16.I2C Interface The ECK30-T13IA series core board supports 4-way I2C controllers and 2 clock frequency modes. T he rate in standard mode is 100Kbit/s and the rate in fast mode is 400Kbit/s. Several devices can be mounted on the same I2C bus. The following points should be noted when d esigning the schematic: a) Check whether the device addresses on the same bus conflict;...
  • Page 38 MHz, can be used to connect 4-wire RTP screen or used as AD_KEY function. 6.19.GPIO interface The ECK30-T13IA series core board can provide up to 79 GPIO interfaces, but most of them have multiplexing functions. Users can flexibly configure GPIO according to their own needs.
  • Page 39 7. Software Resources The ECK30-T13IA series core board is equipped with an operating system based on the Linux 5.4.61 kernel. The development board comes with a cross-compilation tool chain required for embedded Linux s...
  • Page 40 /tools/PhoenixCard 8. Structural dimensions The ECK30-T13IA series core board adopts 140 PIN, 1.0mm pitch stamp hole interface, which can b e STM soldered or hand soldered. There are no components and exposed traces on the bottom of the cor e board, and the bottom board design is simple. The core board structure size is shown in the figure bel Stamp hole core board structure size drawing Copyright ©...
  • Page 41 Time from room temperature to peak temperature 6 minutes, longest 8 minutes, longest ※The peak temperature (Tp) tolerance of the temperature curve is defined as the upper limit of the user Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 42 ECK30-T13IA User Manual V1.2 9.2.Reflow Oven Profile Reflow Oven Profile 10. Reference Documentation T113-i_V1.9.pdf Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 43 HP_DET signal pull-down resistor, and add descriptions related to the insertion detection circuit. 2. Update the reference circuit of the debugging serial port. 12. Contact Us Technical support: support@cdebyte.com Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.
  • Page 44 ECK30-T13IA User Manual V1.2 Documents and RF Setting download link: www.es-ebyte.com Thank you for using Ebyte products! Please contact us with any questions or suggestions: info@cdebyte.com Address: B5 Mould Industrial Park, 199# Xiqu Ave, High tech Zone, Chengdu, Sichuan, Copyright © 2012-2024 , Chengdu Ebyte Electronic Technology Co., Ltd.