Table of Contents
Advertisement
Feature
ECC Configuration
DRAM ECC Enable
MCA DRAM ECC
Logging
ECC Chip Kill
DRAM SCRUB
REDIRECT
DRAM BG Scrub
L2 Cache BG Scrub
Option
DRAM ECC allows hardware to
Enabled
report and correct memory errors
automatically maintaining system
integrity.
Disabled
Disabled
Enables MCA DRAM ECC Logging
Reporting.
Enabled
ECC Chip Kill
Disabled
Enabled
DRAM SCRUB REDIRECT allows
Disabled
the system to correct DRAM ECC
errors immediately when they occur,
Enabled
even if background scrubbing is on.
Disabled
DRAM scrubbing corrects memory
errors so later reads are correct.
40ns
Doing this while memory is not being
80ns
used improves performance.
160ns
Note: When AMD's node interleave
320ns
feature is enabled, BIOS will force
640ns
DRAM scrub off.
1.28us
2.56us
5.12us
10.2us
20.5us
41.0us
81.9us
163.8us
327.7us
655.4us
Disabled
Allows the L2 Data Cache RAM to
be corrected while idle.
40ns
80ns
160ns
320ns
640ns
1.28us
2.56us
5.12us
10.2us
20.5us
41.0us
81.9us
163.8us
327.7us
655.4us
77
http://www.tyan.com
Description
Advertisement
Table of Contents
