Cache Memory - TYAN TIGER 100 Manual

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Chapter 2
Board Installation
PC-100 DIMM is required if CPU bus speed is at 100MHz
The table below shows some of the possible memory configurations. Not all
possible configurations are listed.
D
I
M
M
B
a
k n
1
D
8
M
B
1 x
6 1
M
B
1 x
6 1
M
B
1 x
2 3
M
B
1 x
2 3
M
B
1 x
4 6
M
B
1 x
4 6
M
B
1 x
4 6
M
B
1 x
1
8 2
M
B
1 x
1
8 2
M
B
1 x
1
8 2
M
B
1 x
1
8 2
M
B
1 x
2
6 5
M
B
1 x
2
6 5
M
B
1 x
2
6 5
M
B
1 x
2
6 5
M
B
1 x
Warning! The 256MB DIMMs represented in the table are REGISTERED
memory chips. DO NOT use registered and non-registered memory chips
simultaneously! (Check with your memory dealer for more information).
See www.tyan.com for latest memory compatibility information.

Cache Memory

Celeron processors have the L2 (Level 2) cache built into their architecture, so
there is no need for an L2 cache on the motherboard. The Celeron processor
has a physical L2 cache size of 128KB and a cacheable memory area of 512MB.
I
M
M
B
a
k n
2
D
I
M
8
M
B
1 x
6 1
M
B
1 x
6 1
M
B
1 x
6 1
M
B
1 x
2 3
M
B
1 x
2 3
M
B
1 x
4 6
M
B
1 x
2 3
4 6
M
B
1 x
4 6
4 6
M
B
1 x
4 6
1
8 2
M
B
1 x
4 6
1
8 2
M
B
1 x
1
1
8 2
M
B
1 x
1
0
2
6 5
M
B
1 x
2
6 5
M
B
1 x
2
2
6 5
M
B
1 x
2
22
M
B
a
k n
3
D
I
M
8
M
B
1 x
8
8
M
B
1 x
6 1
M
B
1 x
6 1
6 1
M
B
1 x
6 1
6 1
M
B
1 x
6 1
6 1
M
B
1 x
6 1
M
B
1 x
2 3
M
B
1 x
4 6
M
B
1 x
4 6
M
B
1 x
4 6
8 2
M
B
1 x
8 2
M
B
1 x
1
8 2
0
0
6 5
M
B
1 x
6 5
M
B
1 x
2
6 5
M
B
a
k n
4
T
t o
l a
M
B
1 x
2 3
M
B
0
0 4
M
B
M
B
1 x
4 6
M
B
M
B
1 x
0 8
M
B
M
B
1 x
6 9
M
B
M
B
1 x
1
8 2
M
B
M
B
1 x
1
2 9
M
B
M
B
1 x
2
6 5
M
B
M
B
1 x
3
0 2
M
B
M
B
1 x
3
4 8
M
B
0
3
4 8
M
B
M
B
1 x
5
2 1
M
B
0
2
6 5
M
B
0
5
2 1
M
B
0
7
8 6
M
B
M
B
1 x
0 1
4 2
M
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