Sony HCD-MD1EX - System Service Manual page 68

BD (MD) BOARD IC316 M30610MCA-272FP (MD MECHANISM CONTROLLER)
Pin No. Pin Name
1 JOG0
2 JOG1
3 DAOUT0
4
DAOUT1
5 SQSY
6 REMCON
7 EMP
8 BYTE
9 CNVSS
10 XT-IN
11 XT-OUT
12 SYSTEM-RST
13 XOUT
14 GND
15 XIN
16 +3.3V
17 NMI
18 AMUTE
19
PWR-DWN
20 DQSY
21 STB
22 DARST
23 XINT
24 DA-EN
25 AD-EN
26 MEC-BUSY
27 FLCS
28 FLCLK
29 —
30
FLDATA
31 TXD
32 RXD
33 CLK
34 MAS-BUSY
35 SWDT
36 SRDT
37 SCLK
38 XLAT
39 —
40 DIG-RST
I/O
I Rotary encoder jog dial pulse input terminal Not used (fixed at "H")
I
Rotary encoder jog dial pulse input terminal Not used (fixed at "H")
O Monitor output terminal for the test C1 error rate is output when test mode
O
Monitor output terminal for the test ADER is output when test mode
Subcode Q sync (SCOR) input from the CXD2652AR (IC121)
I
"L" is input every 13.3 msec Almost all, "H" is input
I Remote control signal input terminal Not used (fixed at "H")
O Emphasis control signal output to the A/D, D/A converter (IC201)
I External data bus line byte selection signal input "L": 16 bit, "H": 8 bit (fixed at "L")
— Ground terminal
I Sub system clock input terminal Not used (fixed at "L")
O Sub system clock output terminal Not used (pull down)
System reset signal input from the reset signal generator (IC706) and master controller (IC707)
I
"L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O Main system clock output terminal (7 MHz)
— Ground terminal
I Main system clock input terminal (7 MHz)
— Power supply terminal (+3.3V)
I Non-maskable interrupt input terminal (fixed at "H" in this set)
Audio line muting on/off control signal output terminal "L": line muting on
O
Not used (pull down)
I Power down detection signal input terminal "L": power down, normally: "H"
Digital In U-bit CD format subcode Q sync (SCOR) input from the CXD2652AR (IC121)
I
"L" is input every 13.3 msec Almost all, "H" is input
Strobe signal output to the power supply circuit "H": power on, "L": standby mode
O
Not used (pull down)
O
Reset signal output terminal "L": reset Not used (pull down)
I Interrupt status input from the CXD2652AR (IC121)
Enable signal output to the A/D, D/A converter (IC201) (for D/A converter block)
O
"L": enable
Enable signal output to the A/D, D/A converter (IC201) (for A/D converter block)
O
"L": enable
O MD mechanism controller busy status monitor output to the master controller (IC707)
O Chip select signal output terminal Not used (pull down)
O Display serial data transfer clock signal output terminal Not used (pull down)
I Not used (fixed at "L")
O Display serial data output terminal Not used (pull down)
O UART communication data output to the master controller (IC707)
I UART communication data input from the master controller (IC707)
I Serial clock signal input from the master controller (IC707)
I Master controller busy status monitor input from the master controller (IC707)
O Writing data output to the CXD2652AR (IC121)
I
Reading data input from the CXD2652AR (IC121)
O
Serial clock signal output to the CXD2652AR (IC121)
O Serial data latch pulse signal output to the CXD2652AR (IC121)
I Not used (fixed at "L")
O
Reset signal output to the CXD2652AR (IC121) and BH6511FS (IC152) "L": reset
Function
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