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TA785G3+ BIOS Manual
SouthBridge Configuration
South Bridge Chipse t Configurat ion
SB710 CIMx Verison : 4.7.0
OHCI HC(Bus 0 Dev 18 Fn o)
OHCI HC(Bus 0 Dev 18 Fn 1)
EHCI HC(Bus 0 Dev 18 Fn 2)
OHCI HC(Bus 0 Dev 19 Fn 0)
OHCI HC(Bus 0 Dev 19 Fn 1)
EHCI HC(Bus 0 Dev 19 Fn 2)
OHCI HC(Bus 0 Dev 20 Fn 5)
OnChi p SATA Channe l
OnChi p SATA Type
Optio n ROM POST De lay
SATA IDE Combined Mode
Power Saving Featu res
vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc.
OHCI HC(Bus 0 Dev 18/19/20 Fn 0/1/5)
T his item allows you to control OHCI host controller. (USB 1.1 Device)
Options:
Enabled (Default) / Disabled
EHCI HC(Bus 0 Dev 18/19 Fn 2)
T his item allows you to control EHCI host controller. (USB 2.0 Device)
Options:
Enabled (Default) / Disabled
OnChip SATA Channel
T his option allows you to enable the on-chip Serial AT A.
Options:
Enabled (Default) / Disabled
OnChip SATA Type
T his option allows you to select the on-chip Serial AT A operation mode.
Options:
Native IDE (Default) / RAID / AHCI / Legacy IDE / IDE AHCI
Option ROM POST Delay
Options:
Disabled (Default) / 1 Second / 2 ~ 7 Seconds
BIOS S ETUP UTILITY
Chips et
[ Enabled]
[ Enabled]
[ Enabled]
[ Enabled]
[ Enabled]
[ Enabled]
[ Enabled]
[ Enabled]
[ Native IDE]
[ Disabled]
[ Enabled]
[ Disabled]
27
Options
Disa bled
Enab led
S elect Screen
S elect Item
G o to Sub Scr een
En ter
F1
G eneral Help
F1 0
S ave and Exit
ES C
E xit
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