MSI HPM D4056 User Manual
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MSI HPM D4056 User Manual

MSI HPM D4056 User Manual

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HPM D4056
MS-S3781
Server Motherboard
User Guide

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Summary of Contents for MSI HPM D4056

  • Page 1 HPM D4056 MS-S3781 Server Motherboard User Guide...

  • Page 2: Table Of Contents

    Contents Regulatory Notices ....................4 Specifications ......................7 Overview of Components ..................9 Rear I/O ........................11 OCP 3.0 NIC Mezzanine Slot ................11 DCSCM ........................11 Block Diagram ......................12 CPU Socket ......................14 CPU Installation ....................15 Memory Slots ......................18 CPU0_DIMM_A0/A2~L0/L2: DDR5 DIMM Slots ............ 18 Recommended Memory Population ..............
  • Page 3 USB Connectors .....................29 Other Connectors and Components ..............30 JINTRUDER: Chassis Intrusion Header ............... 30 JIPMB: IPMB Header ................... 30 J2: PDB Management Connector ................ 31 SFP0~1: DC-MHS Control Panel Header .............. 32 OCP0~1: OCP 3.0 Mezzanine Slot ................ 33 DC-SCM: DC-SCM 2.0 Edge Slot ................37 FBP_I2C_1~3: I2C Headers ..................

  • Page 4: Regulatory Notices

    Chemical Substances Information In compliance with chemical substances regulations, such as the EU REACH Regulation (Regulation EC No. 1907/2006 of the European Parliament and the Council), MSI provides the information of chemical substances in products at: https://csr.msi.com/global/index CE Conformity Hereby, Micro-Star International CO., LTD declares that this device is in compliance with the essential safety requirements and other relevant provisions set out in the European Directive.

  • Page 5: Battery Information

    ・ Users should contact the local authorized point of collection for recycling and disposing of their end-of-life products. ・ Visit the MSI website and locate a nearby distributor for further recycling information. ・ Users may also reach us at gpcontdev@msi.com...

  • Page 6: Copyright And Trademarks Notice

    Copyright and Trademarks Notice Copyright © Micro-Star Int’ l Co., Ltd. All rights reserved. The MSI logo used is a registered trademark of Micro-Star Int’ l Co., Ltd. All other marks and names mentioned may be trademarks of their respective owners. No warranty as to accuracy or completeness is expressed or implied.

  • Page 7: Specifications

    Specifications Model D4056 Form factor • DC-MHS M-DNO Type-4 HPM Dimensions • 305.95mm x 295mm • Single AMD EPYC™ 9004 Series Processor and EPYC™ 9005 Series Processor processors, up to TDP 500W Socket • 1 x LGA6096 (Socket SP5) • 24 x DDR5 DIMM slots, 12 channels (2DPC), RDIMM/ 3DS-RDIMM Memory - Max Frequency: 5200 MT/s (2DPC) - Max Capacity per DIMM:...
  • Page 8 Model D4056 • Support via DC-SCM module MGT1: • 1 x 1000Base-T Dedicated Server Management Port Server • ASPEED AST2600 with AMI MegaRAC based firmware supporting IPMI Management 2.0 and DMTF Redfish API • Dual BIOS and dual BMC • eMMC for local BMC storage media •...

  • Page 9: Overview Of Components

    Overview of Components OCP0 OCP1 DC-SCM BATTERY CPLD1 CPU0 Overview of Components...
  • Page 10 CPU0_DIMM_L1 CPU0_DIMM_L0 CPU0_DIMM_K1 CPU0_DIMM_K0 CPU0_DIMM_J1 CPU0_DIMM_J0 CPU0_DIMM_I1 CPU0_DIMM_I0 CPU0_DIMM_H1 CPU0_DIMM_H0 CPU0_DIMM_G1 CPU0_DIMM_G0 CPU0_DIMM_A0 CPU0_DIMM_A1 CPU0_DIMM_B0 CPU0_DIMM_B1 CPU0_DIMM_C0 CPU0_DIMM_C1 CPU0_DIMM_D0 CPU0_DIMM_D1 CPU0_DIMM_E0 CPU0_DIMM_E1 CPU0_DIMM_F0 CPU0_DIMM_F1 Overview of Components...

  • Page 11: Rear I/O

    Rear I/O DC-SCM OCP0 OCP1 Edge slot for DC PCIe 5.0 x16 OCP3 PCIe 5.0 x16 OCP3 SCM module NIC Mezzanine Slot NIC Mezzanine Slot OCP 3.0 NIC Mezzanine Slot OCP NIC 3.0 is an upgrade of OCP Mezz 2.0. It supports two sizes, SFF and LFF. The maximum power of SFF is 80W, and LFF can reach 150W, It is compatible with PCIe Gen 4 and Gen 5.

  • Page 12: Block Diagram

    Block Diagram CPU0 CPU0_DIMM_A0 CPU0_DIMM_G0 DDR5 2DPC DDR5 2DPC CPU0_DIMM_C1 CPU0_DIMM_I1 DIMMx6 DDR5 CH A~F DDR5 CH G-L Socket SP5 DIMMx6 DDR5 2DPC DDR5 2DPC CPU0_DIMM_D0 DIMMx6 CPU0_DIMM_J0 DIMMx6 CPU0_DIMM_F1 CPU0_DIMM_L1 PCIE Gen5(x16) PCIe5.0 x16 SFF-TA-1033 PCIE_SLOT0 PCIE Gen5(x16) JMCIO3 2 x MCIO 8i JMCIO2 PCIE Gen5(x16)

  • Page 13: Component Contents

    Component Contents Component Page CPU Socket Memory Slots CPU0_DIMM_A0~L1, CPU1_DIMMA0~L1: DDR5 DIMM Slots Storage Connectors JMCIO0~7: MCIO 8i Connectors M2_0~1: M.2 Slots (M Key, PCIe 3.0 x2, 2280/22110) Expansion Slots RISER1~2: PCIe Expansion Slots OCP1~2: OCP (Open Compute Project) LAN Mezzanine Slot Power Connectors JPWR1~4: CRPS Power Connectors JPWR3: 6-Pin HPM Power Connectors...

  • Page 14: Cpu Socket

    CPU Socket CPU0 ⚠ Important Overheating will seriously damage the CPU and system. Always make sure the ● cooling fan can work properly to protect the CPU from overheating. Make sure that you apply an even layer of thermal paste (or thermal tape) between the CPU and the heatsink to enhance heat dissipation.

  • Page 15: Cpu Installation

    CPU Installation Use appropriate ground straps, gloves and ESD mats to protect yourself from ⚠ electrostatic discharge (ESD) while installing the processor. Important Images are for illustration purposes only; actual parts may vary. 1. Remove the screw on the top of the retention frame. 2.
  • Page 16 4. Pull the external cap upward through the rail guides on the rail frame to remove 5. Grip the handle of the carrier frame and slide it downward with the flanges and the rail guides aligned. CPUs are shipped from the factory with pre-assembled carrier frames. ●...
  • Page 17 7. Push the retention frame downward and use a torque screwdriver to tighten the screw in the middle. Torque Screwdriver Settings Screw Head: Torx T20 Torque: 12.5-15 kgf·cm* *12.5-15 kgf·cm = 122.6~147 N·m = 10.9~13 lbf·in 8. For peak thermal performance, apply proper amount of thermal paste to the bottom center of the heatsink.

  • Page 18: Memory Slots

    Memory Slots CPU0_DIMM_A0/A2~L0/L2: DDR5 DIMM Slots CPU0_DIMM_L1 CPU0_DIMM_L0 CPU0_DIMM_K1 CPU0_DIMM_K0 CPU0_DIMM_J1 CPU0_DIMM_J0 CPU0_DIMM_I1 CPU0_DIMM_I0 CPU0_DIMM_H1 CPU0_DIMM_H0 CPU0_DIMM_G1 CPU0_DIMM_G0 CPU0_DIMM_A0 CPU0_DIMM_A1 CPU0_DIMM_B0 CPU0_DIMM_B1 CPU0_DIMM_C0 CPU0_DIMM_C1 CPU0_DIMM_D0 CPU0_DIMM_D1 CPU0_DIMM_E0 CPU0_DIMM_E1 CPU0_DIMM_F0 CPU0_DIMM_F1 Memory Slots...

  • Page 19: Recommended Memory Population

    Recommended Memory Population CPU0 F1 F0 E1 E0 D1 D0 C1 C0 B1 B0 A1 A0 G0 G1 H0 H1 I0 I1 J0 J1 K0 K1 L0 L1 1 CPU Channel F1 F0 E1 E0 D1 D0 C1 C0 B1 B0 A1 A0 G0 G1 H0 H1 I0 I1 J0 J1 K0 K1 L0 L1 Qty.

  • Page 20: Installing Memory Modules

    Installing Memory Modules 1. Open the side clips to unlock the DIMM slot. 2. Insert the DIMM vertically into the slot, ensuring that the off-center notch at the bottom aligns with the slot. 3. Push the DIMM firmly into the slot until it clicks and the side clips automatically close.

  • Page 21: Storage Connectors

    Storage Connectors M2_0/M2_1 JMCIO0 JMCIO1 JMCIO4 JMCIO5 JMCIO2 JMCIO3 JMCIO6 JMCIO7 Name Description JMCIO0~7 PCIe 5.0 x8, 32GT/s M2_0~1 PCIe 3.0 x2, 8GT/s JMCIO0~7: MCIO 8i Connectors These are vertical 74-pin Mini Cool Edge IO (MCIO) connectors, which support PCIe 5.0 x16 32GT/s and SATA 3.0 6Gb/s interfaces. A JSATA_NVME_SW1 jumper can be used to switch signals between SATA and PCIe NVMe (default).
  • Page 22 P5E_CPU_PE_NVME_RX_D- P5E_CPU_PE_NVME_TX_D P3V3_AUX JMCIO_BMC_SCL FM_SMB_PEHPCPU_MCIO_LVC3_ALERT_N JMCIO_BMC_SDA CLK_100M_CPU_MCIO_R_D+ PCIe_RST_N CLK_100M_CPU_MCIO_R_D- FM_MCIO_CPU_PESTI_CBL_PRES_N P5E_CPU_PE_NVME_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_NVME_RX_D- P5E_CPU_PE_NVME_TX_D P5E_CPU_PE_NVME_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_NVME_RX_D- P5E_CPU_PE_NVME_TX_D P5E_CPU_PE_NVME_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_NVME_RX_D- P5E_CPU_PE_NVME_TX_D P5E_CPU_PE_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_RX_D- P5E_CPU_PE_NVME_TX_D+ SMB_MCIOP_CPU_SCL FM_MCIO_CPU_FPGA_FLEXIO_3A SMB_MCIOP_CPU_SDA FM_MCIO_CPU_FPGA_FLEXIO_4A USB_HUB_MCIO_CPU_PE_D+ FM_MCIO_CPU_FPGA_FLEXIO_1A USB_HUB_MCIO_CPU_PE_D- FM_MCIO_CPU_FPGA_FLEXIO_2A P5E_CPU_PE_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_RX_D- P5E_CPU_PE_NVME_TX_D P5E_CPU_PE_RX_D+ P5E_CPU_PE_NVME_TX_D+ P5E_CPU_PE_RX_D- P5E_CPU_PE_NVME_TX_D Storage Connectors...

  • Page 23: M2_0~1: M.2 Slots (M Key, Pcie 3.0 X2, 2280/22110)

    M2_0~1: M.2 Slots (M Key, PCIe 3.0 x2, 2280/22110) Please install the M.2 solid-state drive (SSD) into the M.2 slot as shown below. Installing M.2 SSD ⚽ Video Demonstration Watch the video to learn how to Install M.2 SSD. 1. Insert your M.2 SSD into the M.2 slot at a 30-degree angle.

  • Page 24: Expansion Slots

    Expansion Slots PCIE_SLOT0: PCIe 5.0 x16 MCIO(SFF-TA-1033) Slots PCIE_SLOT1: PCIe 5.0 x16 MCIO(SFF-TA-1033) Slots PCIE_SLOT0~1:PCIe Expansion Slots The PCI Express(Peripheral Component Interconnect Express) slots support PCIe interface expansion cards. ⚠ Important When adding or removing expansion cards, make sure that you unplug the power supply first.

  • Page 25: Power Connectors(On Ms-S3781)

    Power Connectors(on MS-S3781) JPWR0 JPICPWR4 JPICPWR3 JPICPWR5 JPICPWR2 JPICPWR1 JPICPWR0 JPICPWR0~3: PIC Power Connectors The PICPWR(Platform Infrastructure Connectivity Power) connector enables the HPM(Host Processor Module) to supply power and manage sideband signals to peripherals,including the GPU Cards (JPICPWR4~5), the Power Distribution Board(JPICPWR1~3)and the Fan Board(JPICPWR0).

  • Page 26: Jpicpwr1~2: 12-Pin Hpm Power Connectors

    JPICPWR1~2: 12-Pin Power Connectors These connectors provide power output to HPM. Power Signals P12V P12V P12V P12V P12V JPICPWR1/JPICPWR2 P12V Sideband Management Signals FM_HPM_JPWR1_B_SB1/ FM_HPM_JPWR1_A_SB1/ FM_HPM_JPWR2_B_SB1 FM_HPM_JPWR2_A_SB1 FM_HPM_JPWR1_B_SB2/ FM_HPM_JPWR1_A_SB2/ FM_HPM_JPWR2_B_SB2 FM_HPM_JPWR2_A_SB2 FM_PS_ON_N/NC FM_PS_PWROK/NC FM_PS_SMB_ALERT_N/NC SMB_JPWR1_1B_LVC3_SCL/ SMB_JPWR1_1A_LVC3_SCL/ SMB_JPWR2_1B_LVC3_SCL SMB_JPWR2_1A_LVC3_SCL SMB_JPWR1_1B_LVC3_SDA/ SMB_JPWR1_1A_LVC3_SDA/ SMB_JPWR2_1B_LVC3_SDA SMB_JPWR2_1A_LVC3_SDA *SB: The term “...

  • Page 27: Jpicpwr0: 12-Pin Fan Board Power Connectors

    JPICPWR0: 12-Pin Fan board Power Connectors These connectors provide power output to Fans. JPICPWR4~5: 12-Pin GPU Power Connectors These connectors provide power output to GPUs. Power Signals P12V P12V P12V P12V P12V JPICPWR4/JPICPWR5 P12V Sideband Management Signals FM_HPM_ FM_HPM_PICPWR_A_ PICPWR_B_SB1 FM_HPM_ FM_HPM_PICPWR_A_ PICPWR_B_SB2...

  • Page 28: Cooling Connectors

    Cooling Connectors JCPUFAN0 JCPUFAN0: CPU Fan Connector The fan power connectors support CPU cooling fans. FAN_TACH JCPUFAN0 P12V FAN_PWM Cooling Connectors...

  • Page 29: Usb Connectors

    USB Connectors JUSB3_0 JUSB3_0: USB 3.0 Connector This port is backward-compatible with USB 3.0 devices and supports data transfer rate up to 5 Gbps. P5V_USB_1 USB2_P3_ESD_DP USB3_P2_ESD_RXN USB2_P3_ESD_DN USB3_P2_ESD_RXP USB3_P3_ESD_TXP USB3_P2_ESD_TXN USB3_P3_ESD_TXN JUSB3_0 USB3_P2_ESD_TXP USB3_P3_ESD_RXP USB2_P2_ESD_DN USB3_P3_ESD_RXN USB2_P2_ESD_DP P5V_USB_2 USB Connectors...

  • Page 30: Other Connectors And Components

    Other Connectors and Components JINTRUDER: Chassis Intrusion Header This connector connects to the chassis intrusion switch cable. If the chassis is opened, the chassis intrusion mechanism will be activated. The system will record this status and show a warning message on the screen. To clear the warning, you must enter the BIOS utility and clear the record.

  • Page 31: J2: Pdb Management Connector

    J2: PDB Management Connector The PDB Management header connects to the power distribution board (PDB). P12V_STBY_PSU P12V_STBY_PSU ISENSE_I_PSYS_R VSENSE_LOCAL_V_PSYS_R P12V_STBY_PSU P12V_STBY_PSU PDB_SGPIO_LD PDB_SGPIO_CK PDB_SGPIO_DO PDB_SGPIO_DI SMB_PS_CLK_R SMB_PS_DAT_R TP_FULL_PWR_CYCLE_N Other Connectors and Components...

  • Page 32: Sfp0~1: Dc-Mhs Control Panel Header

    SFP0~1: DC-MHS Control Panel Header The DC-MHS control panel header for M-PESTI connects the HPM to the server’ sfront panel, enabling essential controls such as power, LED indicators, buttons, and sideband signals for management and monitoring. DC-MHS (Data Center Modular Hardware System) is a modular framework ●...

  • Page 33: Ocp0~1: Ocp 3.0 Mezzanine Slot

    OCP0~1: OCP 3.0 Mezzanine Slot This slot enables the deployment of a wide variety of additional options through OCP(Open Compute Project) network interface cards (NICs) or other expansion Cards. OCP0: OCP 3.0 SFF OCP1: OCP 3.0 SFF (PCIe 5.0 x16) (PCIe 5.0 x16) OB14 OA14...
  • Page 34 Top Side (B Pins) Bottom Side (A Pins) OB11 OA11 CLK_100M_CPU0_OCP0_3_DN/DP RST_CPU0_PE0_OCP0_PERST2_N OB12 OA12 CLK_100M_CPU0_OCP0_2_DN/DP RST_CPU0_PE0_OCP0_PERST3_N OB13 OA13 IRQ_WAKE_CPU0_PE0_OCP0_LVC3_N OB14 OA14 RMII_OCP0_CSDV OCP0_RBT_ARB_IN Mechanical Key P12V_AUX_OCP0 P12V_AUX_OCP0 P12V_AUX_OCP0 P12V_AUX_OCP0 P12V_AUX_OCP0 P12V_AUX_OCP0 PD_OCP0_NIC_BIF0_N SMB_CPU0_PE2_OCP0_LVC3_SCL PD_OCP0_NIC_BIF1_N SMB_CPU0_PE2_OCP0_LVC3_SDA PD_OCP0_NIC_BIF2_N RST_BMC_PCIE_MUX_R_LVC3_N RST_CPU0_PE7_OCP0_PERST0_N PD_CPU0_OCP0_NIC_PRSNTA_N P3V3_AUX_OCP0 RST_CPU0_PE7_OCP0_PERST1_N FM_OCP0_NIC_AUX_PWR_LVC3_R_EN FM_CPU_PE_OCP0_NIC_PRSTN2_N...
  • Page 35 Mechanical Key P5E_CPU0_PE2_OCP_TX_DN4 P5E_CPU0_PE2_OCP_RX_DN4 P5E_CPU0_PE2_OCP_TX_DP4 P5E_CPU0_PE2_OCP_RX_DP4 P5E_CPU0_PE2_OCP_TX_DN5 P5E_CPU0_PE2_OCP_RX_DN5 P5E_CPU0_PE2_OCP_TX_DP5 P5E_CPU0_PE2_OCP_RX_DP5 P5E_CPU0_PE2_OCP_TX_DN6 P5E_CPU0_PE2_OCP_RX_DN6 P5E_CPU0_PE2_OCP_TX_DP6 P5E_CPU0_PE2_OCP_RX_DP6 P5E_CPU0_PE2_OCP_TX_DN7 P5E_CPU0_PE2_OCP_RX_DN7 P5E_CPU0_PE2_OCP_TX_DP7 P5E_CPU0_PE2_OCP_RX_DP7 Top Side (B Pins) Bottom Side (A Pins) FM_CPU0_OCP0_NIC_PRSTN0_N FM_CPU_OCP0_NIC_PRSTN1_N Mechanical Key P5E_CPU0_PE2_OCP_TX_DN8 P5E_CPU0_PE2_OCP_RX_DN8 P5E_CPU0_PE2_OCP_TX_DP8 P5E_CPU0_PE2_OCP_RX_DP8 P5E_CPU0_PE2_OCP_TX_DN9 P5E_CPU0_PE2_OCP_RX_DN9 P5E_CPU0_PE2_OCP_TX_DN9 P5E_CPU0_PE2_OCP_RX_DP9 P5E_CPU0_PE2_OCP_TX_DN10 P5E_CPU0_PE2_OCP_RX_DN10 P5E_CPU0_PE2_OCP_TX_DP10 P5E_CPU0_PE2_OCP_RX_DP10 P5E_CPU0_PE2_OCP_TX_DN11...
  • Page 36 P5E_CPU0_PE2_OCP_TX_DN12 P5E_CPU0_PE2_OCP_RX_DN12 P5E_CPU0_PE2_OCP_TX_DP12 P5E_CPU0_PE2_OCP_RX_DP12 P5E_CPU0_PE2_OCP_TX_DN13 P5E_CPU0_PE2_OCP_RX_DN13 P5E_CPU0_PE2_OCP_TX_DP13 P5E_CPU0_PE2_OCP_RX_DP13 P5E_CPU0_PE2_OCP_TX_DN14 P5E_CPU0_PE2_OCP_RX_DN14 P5E_CPU0_PE2_OCP_TX_DP14 P5E_CPU0_PE2_OCP_RX_DP14 P5E_CPU0_PE2_OCP_TX_DN15 P5E_CPU0_PE2_OCP_RX_DN15 P5E_CPU0_PE2_OCP_TX_DP15 P5E_CPU0_PE2_OCP_RX_DP15 FM_CPU0_PE0_OCP0_PRSTN3_QS_N USB2_OCP_NIC_DN USB2_OCP_NIC_DP FM_PWRBRK_CPU0_PE2_OCP0_ FM_CPU_PE_OCP0_NIC_PRSNTB3_N LVC3_N Other Connectors and Components...

  • Page 37: Dc-Scm: Dc-Scm 2.0 Edge Slot

    DC-SCM: DC-SCM 2.0 Edge Slot The slot links the Datacenter Secure Control Module (DC-SCM) to the motherboard, enabling centralized power, management, and security control across server hardware. This standardized interface allows easy upgrades and compatibility across various platforms. DC-SCM: DC-SCM 2.0 Edge Slot (PCIe 5.0 x1 from CPU0) OB14 OA14...
  • Page 38 Top Side (B Pins) Bottom Side (A Pins) OB11 OA11 USB2_BMC_HUB_DN OB12 OA12 USB2_BMC_HUB_DP OB13 OA13 OB14 OA14 P1V0_AUX PECI_SCM Mechanical Key CLK_66M_ESPI_CPU0_LVC18 P12V_AUX_SCM ESPI_CPU0_CS0_SCM_N P12V_AUX_SCM RST_ESPI_CPU0_LVC18_N P12V_AUX_SCM ESPI_CPU0_IO0_LVC18 P12V_AUX_SCM ESPI_CPU0_IO1_LVC18 ESPI_CPU0_IO2_LVC18 ESPI_CPU0_IO3_LVC18 IRQ_ESPI_CPU0_ALERT0_FPGA_ BMC_JTAG_LVC3_TCK LVC18_N BMC_JTAG_LVC3_TDI BMC_JTAG_LVC3_TDO BMC_JTAG_LVC3_TMS SPI_CPU0_CLK_DCSCM_LVC18_R1 SPI_CPU0_CS0_DCSCM_LVC18_R1_N FM_HPM_STBY_RST_N SPI_CPU0_IO0_DCSCM_LVC18_R1...
  • Page 39 P3V_BAT_CPU0 RST_PLD_PCIE_CPU0_DEV_PERST_N Mechanical Key P5E_CPU0_PE1_TX_DN2 P5E_CPU0_PE1_RX_DN2 P5E_CPU0_PE1_TX_DP2 P5E_CPU0_PE1_RX_DP2 HUB_SSTX4N HUB_SSRX4N HUB_SSTX4P HUB_SSRX4P BMC_TYPEA_DN CLK_100M_SCM_DN BMC_TYPEA_DP CLK_100M_SCM_DP I3C_DBG_SCM_LVC18_R_SCL I3C_SPD_SCM_R_LVC1_SCL I3C_DBG_SCM_LVC18_R_SDA I3C_SPD_SCM_R_LVC1_SDA I3C_MNG_SCM_LVC1_R_SCL Top Side (B Pins) Bottom Side (A Pins) I3C_MNG_SCM_LVC1_R_SDA Mechanical Key CLK3_50M_SCM_RMII_CLK SMB_PCIE_SCM_LVC3_R_SCL RMII3_SCM_CRS_DV_R SMB_PCIE_SCM_LVC3_R_SDA RMII3_SCM_TX_EN_R SMB_IPMB_LVC3_CLK RMII3_SCM_TXD0 SMB_IPMB_LVC3_DAT RMII3_SCM_TXD1 SMB_CPLD_UPDATE_SCM_LVC3_R_SCL RMII3_SCM_RXD0...
  • Page 40 SMB16_IPMB_LVC3_SCL SPI_CPU0_TPM_MOSI_LVC18_MUX_R1 SMB16_IPMB_LVC3_SDA SPI_CPU0_TPM_MISO_LVC18_MUX_R1 FM_SCM_PRSNT0_LVC3_N SCM_GPIO SPI_BMC_FP_CK_R SPI_IRQ_SCM_TPM_N SPI_BMC_FP_MISO_R SPI_BMC_FP_MOSI_R SPI_BMC_FP_CS0_R UART0_RX_HPM_SCM_DATA BMC_USB2A_DN BMC_USB2A_DP Other Connectors and Components...

  • Page 41: Fbp_I2C_1~3: I2C Headers

    FBP_I2C_1~3: I2C Headers I2C headers are used to connect to the System Management Bus (SMBus). FBP_I2C_1~3 is for HDD backplanes. P3V3_AUX FBP_I2C_1 SMB_HSBP_LVC3_R_SCL FBP_I2C_2 FBP_I2C_3 SMB_HSBP_LVC3_R_SDA FBP_I2C_1 FBP_I2C_2 FBP_I2C_3 Other Connectors and Components...

  • Page 42: Bat1: Cmos Battery

    BAT1: CMOS Battery If the CMOS battery is out of charge, the time in the BIOS will be reset and the data of system configuration will be lost. In this case, you need to replace the CMOS battery. Replacing CMOS battery 1.

  • Page 43: Jumpers

    Jumpers ⚠ Important Avoid adjusting jumpers when the system is on; it will damage the motherboard. CMOS_CLR JUART_SEL_1 BIOS_SEL JSATA_NVME_SW1 Default Jumper Name Description Setting 1-2: System BIOS ROM and control by Jumper (default) BIOS_SEL 2-3: Local BIOS ROM 1-2: Normal (Default) CMOS_CLR 2-3: CMOS Clear 1-2: UART CPLD to CPU (default)

  • Page 44: Onboard Leds

    Onboard LEDs LED1: CPLD state LED This LED indicates the CPLD (Complex Programmable Logic Device) status. Status Description CPLD not ready Blinking Green 4Hz CPLD ready CPLD_State_LED PWROK_LED1: CPU PowerOK LED, PWRGD_LED1: CPU PowerGood LED The PWROK LED indicates CPU PWROK status.The PWRGD LEDs indicates that all voltage inputs to the processor are in specification.
  • Page 45 MSI.COM EPS.MSI.COM...

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