Allen-Bradley publication SGI-1.1, Safety Guidelines for the Application, Installation and Maintenance of Solid-State Control (available from your local Allen-Bradley office), describes some important differences between solid-state equipment and electromechanical devices that should be taken into consideration when applying products such as those described in this publication.
Summary of Changes The information below summarizes the changes to this manual since the last printing. To help you find new updated information in this release, we included changes bars as shown to the right of this paragraph. New Information The table below lists sections that document new features and additional information about existing features, and shows where to find this new information.
Specifications for temperature, humidity, input, output, and voltage Appendix A Information on connecting a differential encoder to the multi-channel high-speed counter module Appendix B A quick reference to the 1746-HSCE2 module programming blocks Appendix C Answers to frequently asked questions about the 1746-HSCE2 module Appendix D...
An article on wire sizes and types for grounding electrical equipment National Electrical Code Fire Protection Association of Boston, MA A complete listing of current Allen-Bradley documentation, including ordering instructions. Also indicates whether the documents are Allen-Bradley Publication Index SD499 available on CD-ROM or in multiple languages.
• warranty support • support service agreement Technical Product Assistance If you need to contact Allen-Bradley for technical assistance, please review the Troubleshooting section of chapter 5 first. Then call your local Allen-Bradley representative. Your Questions or Comments on the Manual If you find a problem with this manual, please notify us.
• operating class • hardware features Multi-Channel High- The 1746-HSCE2 is an intelligent counter module with its own microprocessor and I/O that is capable of reacting to high-speed input Speed Counter Module signals without the intervention of the SLC processor. The module is...
Module Overview Outputs Eight outputs are available, four real (dc sourcing) and four virtual bits. The virtual outputs are available to the processor only. The real outputs are protected from overloads by a self-resetting fuse. The outputs can be controlled by any or all of the counters and/or directly controlled by the user’s program.
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Module Overview Most programming parameters, except those in the module setup and counter configuration blocks, are dynamic and can be changed without halting counter operation. The table below lists the static and dynamic parameters by programming block. Programming Block Parameter Type Operating Mode Range Allocation...
Module Overview Operating Class Module operation differs slightly based on the operating class. The operating class is selected via the module ID code. Class 1 Class 1 operation is compatible with all SLC 500 processors. In Class 1 operation, the module uses 8 input and 8 output words and has an associated ID code of 3511.
Module Overview LEDs The front panel has a total of twelve indicator LEDs, as shown in Figure 1.1 on page 1-4. Color Indicates 0 OUT Green ON/OFF status of real output 1 OUT Green ON/OFF status of real output 2 OUT Green ON/OFF status of real output 3 OUT...
Chapter Module Operation The chapter contains information about: • operating modes • input configurations • gate/preset modes • counter types • rate value • outputs • range types Operating Modes The module’s operating mode determines the number of available counters and which inputs are attached to them. The three operating modes and their input assignments are summarized in Figure 2.1.
Module Operation Input Configurations Input configurations determine how the A and B inputs cause the counter to increment or decrement. The six available configurations are: • Pulse/External Direction • Pulse/Internal Direction • Up and Down Pulses • X1 Quadrature Encoder •...
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Module Operation Up and Down Pulses In this configuration, the counter increments on the rising edge of pulses applied to input A and decrements on the rising edge of pulses applied to input B. Note: When both inputs transition simultaneously or near simultaneously, the net result is no change to the count value.
Module Operation X4 Quadrature Encoder Operation is similar to the X2 quadrature encoder configuration, except the counter changes value on the rising and falling edges of inputs A and B as shown in Figure 2.4. Figure 2.4 Quadrature Encoder Configurations Input Input Quadrature...
Module Operation Gate/Preset Modes A counter’s gate/preset mode determines what, if any, gating is applied to the counter and what, if any, conditions will preset the counter to the preset value. The Z inputs are the only inputs used for gating or presetting.
Module Operation Store/Preset/Hold/Resume The counter is set to its programmed preset value when the module counter has stopped start detects a positive transition on the Z input of the counter. The capture counting counting value is made available to the backplane. A stored status bit is set in from preset stop count, store count,...
Module Operation Capture Value Bit Operation In programs exceeding 10 ms scan times, the capture value bit may be reset before it is read into the I/O image at the processor. Summary of Available The table below summarizes the Input Configurations and Gate/Preset Modes available for all counters, based on Operating Counter Mode.
Module Operation Ring Counter Figure 2.6 demonstrates ring counter operation. In ring counter operation, the count value changes between programmable minimum and maximum values. If, when counting up, the counter reaches the maximum value, it rolls over to the minimum value. If, when counting down, the counter reaches the minimum value, it rolls over to the maximum value.
Module Operation Accuracy The accuracy of the rate value can be ±0.005% (typical). For this resolution, the rate measurement value must be transferred in single- precision floating-point format. This format is only available when the module operates as Class 4. Fractional rates, those between 1 and 0 or -1 and 0, are not reported.
2-10 Module Operation Count Range In a count range, the outputs are active if the count value is within the user-defined range. The valid count range is dependent upon the operating class. In Class 1, the valid range is -32,767 to +32,767. In Class 4, the valid range is -8,388,607 to +8,388,607.
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Module Operation 2-11 Figure 2.8 Count Range with Ring Counter Range 3 32,000 Range 2 32,767 23,000 8,000 Range 4 20,000 10,000 Range 1 12,500 Outputs Start Stop Outputs Range Value Value Affected 10,000 12,500 8,000 32,000 20,000 23,000 0 and 3 1.
2-12 Module Operation Rate Range In a rate range, the outputs are active if the rate measurement is within the user-defined range. The valid input rate is dependent upon the operating class. In Class 1, the input rate can be up to 32,767 Hz in either direction.
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Module Operation 2-13 Figure 2.10 Mode 1 Input Data Format 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Output State Word 0 MODE Virtual Real Word 1 Counter 2 Status Counter 1 Status Word 2 Counter 1: Count Value Word 3...
2-14 Module Operation Class 4 Operation In Class 4 operation, the counter data consist of a maximum of 23 words. Figure 2.13 Class 4 Data Format 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Output State Word 0 MODE...
Module Operation 2-15 Input Word Bit Values ACK: Acknowledge Bit This bit makes a 0 to 1 transition to signal the receipt of programming data. MFLT: Module Fault Bit This bit is reset when the module is functioning normally. PERR: Programming Error Bit The state of this bit is valid only when the acknowledge bit is set.
2-16 Module Operation Output State Byte These bits correspond to the real or virtual state of the outputs. Bits 00 through 03 represent real outputs. Bits 04 through 07 represent virtual outputs. Counter Status Bytes Each counter has an associated status byte. The format of the byte depends on the module’s class of operation as shown below.
Module Operation 2-17 COvF: Counter Overflow Bit When the counter is configured as a Linear Counter, this bit is set when the count would become one over the Maximum Count Value. Note: Counter overflow or underflow bits are reset when a pulse in the opposite direction is received.
Programmable Controllers, Part 2 – Equipment Requirements and Tests. For specific information required by EN61131-2, see the appropriate sections in this publication, as well as the following Allen-Bradley publications: • Industrial Automation, Wiring and Grounding Guidelines for Noise Immunity, publication 1770-4.1 •...
Installation and Wiring Prevent Electrostatic Discharge ATTENTION: Static discharges may cause permanent damage to the module. Follow these guidelines when you handle the module: • Touch a grounded object to discharge static potential. • Wear an approved wrist-strap grounding device. •...
Installation and Wiring Installing the Module ATTENTION: Disconnect power before attempting to install, remove, or wire the module. 1. Make sure your SLC power supply has adequate reserve current capacity. The module requires 250 mA at +5V dc. 2. Align the full-sized circuit board with the chassis card guide as shown in Figure 3.2.
VKRXOG FRUUHFW WKLV FRQGLWLRQ 6HH ³=SXOVH 3UHVHW 2SHUDWLRQ´ RQ SDJH Electronic Protection The electronic protection of the 1746-HSCE2 has been designed to provide protection for the module from overload current conditions. The protection is based on a thermal cut-out principle. In the event of...
Installation and Wiring Auto Reset Operation Important: 1746-HSCE2 outputs perform auto-reset under overload conditions. When an output channel overload occurs as described above, all channels turn off within milliseconds after the thermal cut-out temperature has been reached. While the overcurrent condition is present, the module tries resetting the outputs at intervals of 500 ms.
Differential encoders provide the best immunity to electrical noise. We recommend, whenever possible, to use differential encoders. The wiring diagrams on the following pages are provided to support the Allen-Bradley encoders you may already own. Differential Encoder Wiring Figure 3.5 Differential Encoder Wiring...
• programming blocks • programming block default values Selecting Operating The 1746-HSCE2 module has two operating classes which are determined by the ID code used by the module. Class Class 1 operation uses 8 input and 8 output words and is compatible with SLC 5/01 and above processors and the 1747-ASB module.
1. Write the new data into the correct output image table words. A bit in the first output word determines the type of programming block. 2. Set the Transmit bit in the output image table. The 1746-HSCE2 will not act on the new programming block until the Transmit bit is set.
In this example, the 1746-HSCE2 module is located in slot 3, the upper 4 digits of the rate value are stored in the input data file word 4 (I:3.4), and the lower 3 digits of the rate value are stored in input data...
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Configuration and Programming Converting from Floating Point to Two-word Integer Format RSLogix500 programming software can also be used to convert from floating point to two-word integer format as shown below. F8:4 holds the number to be converted. It is divided by 1000, and the result is placed in F8:3. Two- Word I Temp 0001 Divide...
Reading the Data In the following example, the 1746-HSCE2 module is located in slot 3. The rate value, in floating point rate value format, is located in input data file words 4 and 5 (I:3.4 and I:3.5). To view the rate value for counter 1, use the copy instruction as shown below.
Configuration and Programming Programming Blocks Module Setup Block Figure 4.1 shows the format of the Module Setup block. This block sets the module’s basic configuration and range allocation to the counters. Counters cannot be running when this block is sent to the module or a programming error results.
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Configuration and Programming RVF: Rate Value Format (Word 1, Bit 09) Important: This bit is not used in Class 1. Setting this bit while using Class 1 causes a programming error. In Class 4, the module transmits the rate value in a two-word integer format when this bit is reset (0).
Configuration and Programming The sum of the range allocation values cannot exceed 16, or the module responds with a programming error. Unused range allocation words in Modes 1 and 2 must equal zero, or an error occurs. Important: The number of ranges for the last configured counter used must equal zero, otherwise the module fills in the value and errors, even if the value is correct.
Configuration and Programming Mode 3 Example In the Module Setup block below, four ranges are assigned to Counter 1. Eight ranges are assigned to Counter 2. Two ranges are assigned to Counter 3. The last two ranges are assigned to Counter 4, but the counter is not specified.
4-10 Configuration and Programming Figure 4.4 Counter Configuration Block Format 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Word 0 Word 1 G/P Mode Input Config Counter 1 Word 2 RESERVED: Must equal 0 Word 3 G/P Mode Input Config...
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Configuration and Programming 4-11 CType: Counter Type Bit (Words 1 and 3, Bit 00; Word 5, Bits 00 and 08) For each counter, this bit defines whether the counter is a ring or linear counter. Table: 4.3 Counter Type Programming Bit Settings Counter Type Ring Counter Linear Counter...
4-12 Configuration and Programming G/P Mode: Gate/Preset Mode Bits (Words 1 and 3, Bits 04 to 06; Word 5, Bits 09 and 01) Counters 3 and 4 have only two Gate/Preset Modes available. Therefore, they have only one G/P Mode bit. When this single bit is equal to zero, the No Preset mode is selected.
Configuration and Programming 4-13 Figure 4.5 Minimum/Maximum Count Value Block 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 CNTR Word 0 Word 1 Upper 4 digits: Minimum Count Value Word 2 Lower 3 digits: Minimum Count Value Word 3 Upper 4 digits: Maximum Count Value Word 4...
4-14 Configuration and Programming Preset Value (Words 5 and 6) The preset value can be programmed to any number between the min- imum count value and the maximum count value. If the preset value does not fall between the minimum and maximum count values, a programming error results.
Configuration and Programming 4-15 Linear Counter As a linear counter, the counter counts between the minimum and the maximum value. If the maximum value would be exceeded when the counter is counting up, the counter stops counting and an overflow bit is set in the status field of the counter.
4-16 Configuration and Programming DEBUG: Debug Mode Selection Bit (Word 0, bit 12) When this bit is set, the debug mode is activated. Debug mode returns the input data file showing current settings in the Min./Max. Rate Value block. For details, see “Debug Mode Operation” on page 5-6. CNTR No.: Counter Number Bits (Word 1, Bits 08 and 09) These two bits select the counter to which this programming block is applied.
Configuration and Programming 4-17 Class 4 When the module is operating as Class 4, the data format of the minimum/maximum rate values is determined by the rate value format bit in the Module Setup programming block. When this bit specifies that the rate value be in floating-point format, the minimum/ maximum rate values are also programmed in floating-point format.
4-18 Configuration and Programming Programming Bit Values Programming Block Identification Bit (Word 0, Bit 04) This bit identifies the type of block. TRMT: Transmit Bit (Word 0, Bit 15) A 0 to 1 transition starts a programming cycle. DEBUG: Debug Mode Selection Bit (Word 0, bit 12) When this bit is set, the debug mode is activated.
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Configuration and Programming 4-19 Range No.: Range Number Bits (Word 1, Bits 00 to 15) These bits define which ranges (0-15) will be programmed or reset. If a bit is set (1), the corresponding range is programmed. The number of ranges available is programmed with the range allocation parameters in the Module Setup programming block.
4-20 Configuration and Programming If the start value is less than the stop value, the output state is applied when the count or rate is within the range specified by the two values. (For example, see ranges 1 through 3 on page 2-10.) If the start value is greater than the stop value, the output state is applied when the count or rate is outside the range.
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Configuration and Programming 4-21 Programming Block Identification Bit (Word 0, Bit 07) This bit identifies the type of block. Control Words (Words 1 to 4) Each counter has its own control word. Table: 4.9 Control Word Assignments Control Words Counter Number Word 1 Counter 1 Word 2...
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4-22 Configuration and Programming ID n : Internal Direction (n) Bit (Words 1 to 4, Bit 02) When the counter has its input configuration set to Pulse/Internal Direction, the state of this bit determines the direction in which the counter counts. When this bit is reset, the counter increments. When this bit is set, the counter decrements.
Configuration and Programming 4-23 Enable Range (Word 6) When a bit in this word is reset (0), the corresponding range (1-16) is disabled, and the output state for the range is ignored. When a bit in this word is set (1), the corresponding output state for the range is used to determine the state of the eight outputs.
4-24 Configuration and Programming Programming Block The following tables list the default values for all of the programmed parameters in each class and operating mode. The default operating Default Values mode for each class is mode 1. Class 1 Table: 4.10 Class 1, Mode 1 Default Values Parameter Counter 1 Counter 2...
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Configuration and Programming 4-25 Table: 4.12 Class 1, Mode 3 Default Values Parameter Counter 1 Counter 2 Counter 3 Counter 4 Debug Mode Inactive Selection Range Allocation Counter Type Ring Ring Ring Ring Input Configuration Pulse/Internal Pulse/Internal Pulse/Internal Pulse/Internal Gate/Preset Mode No Preset No Preset No Preset...
4-26 Configuration and Programming Class 4 Table: 4.13 Class 4, Mode 1 Default Values Parameter Counter 1 Counter 2 Debug Mode Inactive Selection Range Allocation Counter Type Ring Ring Input Configuration X1 Quadrature X1 Quadrature Gate/Preset Mode Store/Preset/Start Store/Preset/Start Minimum Count -8.388,607 -8,388,607 Maximum Count...
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Configuration and Programming 4-27 Table: 4.15 Class 4, Mode 3 Default Values Parameter Counter 1 Counter 2 Counter 3 Counter 4 Debug Mode Inactive Selection Range Allocation Counter Type Ring Ring Ring Ring Input Configuration Pulse/Internal Pulse/Internal Pulse/Internal Pulse/Internal Gate/Preset Mode No Preset No Preset No Preset...
Start Up The following steps will assist you in the start up of your 1746-HSCE2 module. 1. Install the module in the chassis. 2. Wire the input and output devices.
Start Up, Operation, Troubleshooting, and Debug Mode Troubleshooting Three types of module-generated errors can occur: • module diagnostic errors • module programming errors • application errors. The Fault LED indicates a module diagnostic error. Fault LED Problem Module diagnostic error. Cycle power. If condition persists, replace Solid Red the module.
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Start Up, Operation, Troubleshooting, and Debug Mode Module Programming Errors A programming error is caused by improper set up of a module parameter. The module responds to a programming error by setting the programming error bit. When this bit is set, the entire programming block is rejected.
Check the LEDs associated with the Channel A and B inputs which have pulses coming in. The A and B LEDs should flash whenever pulses are being received by the 1746-HSCE2 module. If the A and B LEDs do not flash, check the power to the input sensor and the wiring from the sensor to the module.
Start Up, Operation, Troubleshooting, and Debug Mode Counter Value/Rate Value Goes in the Wrong Direction If single-ended encoder inputs are used, swap channels A and B to change the direction. If differential encoder inputs are used, swap A(+) and A(-) wires. If pulse and direction inputs are used, check the direction and input type.
Start Up, Operation, Troubleshooting, and Debug Mode Debug Mode Operation The debug mode allows you to look at the existing module setup of the programming blocks. When invoked, debug mode echoes back the programming data instead of showing counts and rates in the input data file.
Start Up, Operation, Troubleshooting, and Debug Mode In the Minimum/Maximum Count Value Block For this block, the transmit bit, the debug bit, the block type byte, and the counter number are required for each configured counter. Word 0 must be used for each configured counter individually. Bit 10 is ignored and bits 11, 13, and 14 must be zero.
Chapter Application Examples This chapter contains the following application examples: • Example 1 uses the 1746-HSCE2 in Class 1, mode 3 to count four single-ended, high-speed pulse train inputs using direct addressing only (SLC 5/01™ or SLC 5/02™). • Example 2 tracks counts and speeds from two quadrature encoders with indirect addressing (SLC 5/03™...
Application Examples User Program Ladder 8 - HSCE2 LAD 8 - HSCE2 Prior to use, the programmer sets N11:2 to the total number of data blocks which will be entered into file N10 (not including the Counter Control Block), adds one rung for each configuration block (including the Counter Control Block), and initializes the data blocks in file N10.
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Application Examples Programming ladder file 9 shows the direct addressing required to set up the programming blocks in this example. Ladder 9 - HSCE2 INIT LAD 9 - HSCE2 INIT Copy Module Setup Block to the HSCE2 and set transmit bit (O:n.0/15) DATA_BLOCK_OFFSET TRANSMIT_BIT ACK_BIT...
Application Examples Ladder File 9 Continued When the previous block is completed (transmit and acknowledge bits are reset), copy Counter3's Min/Max Count Value Block to the HSCE2 and set transmit bit (O:n.0/15) DATA_BLOCK_OFFSET TRANSMIT_BIT ACK_BIT 0004 Equal Copy File Source A N11:0 Source #N10:40...
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Application Examples Ladder File 9 Continued When the previous block is completed (transmit and acknowledge bits are reset), copy Counter 1's third Program Range Block to the HSCE2 and set transmit bit (O:n.0/15) DATA_BLOCK_OFFSET TRANSMIT_BIT ACK_BIT 0008 Equal Copy File Source A N11:0 Source...
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Application Examples Ladder File 9 Continued When the previous block is completed (transmit and acknowledge bits are reset), copy Counter 1's seventh Program Range Block to the HSCE2 and set transmit bit (O:n.0/15) DATA_BLOCK_OFFSET TRANSMIT_BIT ACK_BIT 0012 Equal Copy File Source A N11:0 Source...
Application Examples Ladder File 9 Continued Note: The Counter Control Block does not require a 0-1 positive transition on the transmit bit to operate. DATA_BLOCK_OFFSET TRANSMIT_BIT ACK_BIT 0015 Equal Copy File Source A N11:0 Source #N10:140 140< OTHER OTHER Dest #O:1.0 Source B N11:1...
Application Examples Example 2 In this example, the module is set up in Class 4, Mode 1 using only two counters. This example uses indirect addressing, which is compatible only with SLC 5/03 or higher processors. The data tables follow the ladder logic. User Program Ladder 8 - HSCE2 LAD 8 - HSCE2...
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Application Examples Programming ladder file 9 shows the indirect addressing required to set up the programming blocks in this example Ladder 9 - HSCE2 INIT LAD 9 - INIT HSCE2 If the blocks have not all been transmitted (block data offset < max block offset). Copy Block to the HSCE2 and set transmit bit (O:n.0/15) DATA_BLOCK_OFFSET TRANSMIT_BIT...
6-10 Application Examples Data Table for N10 File Data File N10 (hex) Programming Blocks Offset Module Setup N10:0 Counter Configuration N10:10 N10:20 Min./Max.Count Value Cntr. 1 Min./Max. Count Value Cntr. 2 N10:30 N10:40 FF9C Min./Max. Rate Value Program Ranges N10:50 Program Ranges N10:60 Program Ranges...
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Application Examples 6-11 User Program Ladder 8 - HSCE2 LAD 8 - HSCE2 Prior to use, the programmer sets N11:2 to the total number of data blocks which will be entered into file N10 (not including the Counter Control Block) and initializes the data blocks in file N10. Note: Ten integer data blocks are used (instead of eight) to simplify display in data windows.
6-12 Application Examples Ladder File 8 Continued Because the BTR data transfer is asynchronous to the program scan, buffer the data from the HSCE2 module so that the same data is being used throughout the entire ladder logic program. BTR_DONE #BTR_DATA_ECHO BT20:0 Copy File...
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Application Examples 6-13 Programming ladder file 9 shows the block transfer function required to set up the programming blocks in this example. Ladder 9 - HSCE2 INIT LAD 9 - INIT HSCE2 If the configuration blocks have not all been transmitted (block data pointer < max block offset), copy next block to the HSCE2 and set transmit bit (O:n.0/15) and trigger the block transfer write (B3/2).
6-14 Application Examples Ladder File 9 Continued When the last block is completed (block data offset = max block offset), copy the Counter Control Block to the HSCE2. Note: The Counter Control Block does not require a 0-1 positive transition on the transmit bit to operate. DATA_BLOCK_POINTER HSCE2_TRNSMT_BIT HSCE2_ACK_BIT...
Appendix Specifications General Table: A.1 Operating Temperature 0°C to +60°C (+32°F to +140°F) Storage Temperature -40°C to +85°C (-40°F to 185°F) Humidity 5 to 95% without condensation Backplane Current Consumption 250 mA at +5V dc (power supply loading) 0 mA at +24V dc Backplane Isolation 1000V dc Maximum Cable Length...
Specifications Outputs (sourcing) Table: A.3 1.0 A at 40°C Max. On-State Output Current (per channel) 1.0 A at 60°C 2.0 A at 40°C Max. On-State Current (per module) See the derating graph below. 1.5 A at 60°C Max. On-State Voltage Drop 0.5V Max.
Specifications Throughput and Timing Table: A.4 Timing (µs) Operation Description Minimum Typical Maximum The delay between the time the module receives a pulse and when its Throughput real outputs and the SLC backplane are updated (based on a count 1600 range).
(false). If this condition is not met, inconsistent homing may occur. If you are using an Allen-Bradley Bulletin 845H differential encoder, this condition is met by following the wiring diagrams in the manual. The following five steps describe how to connect a differential encoder to the module.
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Connecting a Differential Encoder 5. Since the encoder may be mounted on either end of a motor shaft, the encoder may spin clockwise or counter- clockwise for a given shaft direction. As a result, the direction (phasing) of the encoder may be backwards. If this is the case, exchange the A(+) wire with the A(-) wire.
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Appendix Module Programming Quick Reference The module programming blocks are duplicated below for your reference. A column has been added to show corresponding hex values. Figure C.1 Module Setup Block 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Hex Format Word 0 Word 1...
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Module Programming Quick Reference Figure C.3 Minimum/Maximum Count Value Block 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Hex Format CNTR Word 0 Upper 4 digits: Minimum Count Value Word 1 Lower 3 digits: Minimum Count Value Word 2 Upper 4 digits: Maximum Count Value Word 3...
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Module Programming Quick Reference Figure C.6 Counter Control Block 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Hex Format Word 0 P1 0 Word 1 P2 0 Word 2 P3 0 Word 3 P4 0 Word 4 Output OFF (AND) Mask...
Appendix Frequently Asked Questions This appendix presents some of the more commonly asked questions about application and operation of the Multi-channel High Speed Counter module. The following questions and answers do not cover all possible questions, but are representative of the more common ones. Q: What happens when my processor faults? A: All outputs will turn off.
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Frequently Asked Questions Q: Can I connect all of my outputs to the same output device? A: Any or all of the 4 module outputs can go to the same output device, as long as the output commons and Vcc are the same and the total output current is less than 1.5 A.
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Glossary The following terms and abbreviations are used throughout this manual. For definitions of terms not listed here refer to Allen- Bradley’s Industrial Automation Glossary, Publication AG-7.1. class – The class of the module (Class 1 or Class 4) determines: (1) its compatibility with various processors;...
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Glossary-2 underflow (counter) – The module’s status when the count value would be less than the minimum value. underflow (rate) – The module’s status when the rate value is less than the minimum value. virtual output – The status bits within the module that are set by module’s program and can be examined by the user program.
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Index counter control block, 4-20, C-3 control words, 4-21 abbreviations, Glossary-1 count or rate value bit, 4-22 acknowledge bits, 4-2 enable counter (n) bit, 4-21 application errors, 5-4 enable range bits, 4-23 counter overflow, 5-4 error conditions, 5-4 counter underflow, 5-4 internal direction (n) bit, 4-22 rate overflow, 5-4 output OFF (AND) mask, 4-22...
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