JVC C-1336 Service Manual page 3

Video, Sync. and chroma circuit in this model are incor-
porated into a 42 pin LSI(IC201), eliminating the need
for adjusting color Sync., V. Sync. and H. Sync.
1. Video. signals, video-detected by the !C101 and video
signals. from VIDEO IN terminal are input into the No..
and No.
"pins of C201 through switching IC. Those
signals input through the No. 67 pin are subjected to"
pedestal. clamping/picture adjusting and output icon
the No. pin. :
After being delayed by' he DL201, "these signals 2 are 'once Ute wt Naeats
more input into the IC 201, 'subjected. to brightness. ad-" Bee ae.
: to: 1/32 and output through No. @B pin; while V. fre-
"as quency: is obtained by dividing it into 1/525 after effec-
"ting. 1/16 frequency demultiply to get 2fH, and output
'through No. pin after Vv. drive. Refer to the BLOCK
justment™: and amplification, and then 'distributed 'to
respective chroma output circuits 'through uaa fae
from the No. pin (Y signals).
2. On the other hand, the other group of signals than': si sale :
input through No. B)pin and output through No. @8)pin | ~
passes' ote the BPT, is input through the No. @)
e 10721 SENSOR CONTROL Ic
| C-1336
pin of IC201, and is demodulated after being subjected
to BP amplifying by the chroma signal circuits, output-
ting color difference signals through the No. (8) ps and
pins.
_ Meanwhile, those signals input though the No. @ pin
— namely, sync. signals are separated by"the sync.
separation circuits in C201 and input t xe) the AFC cir-
cuit in-IC201.
. The 32H oscillation circuit in: C201 is.a joe-fun type
requiring. no. 'adjustment by" 'the. VCO. using a CF501
ceramic filter: H: frequency i is obtained by dividing it in-
DIAGRAM for renal service.
PIN FUNCTIONS
+5 V power supply input
= Reset input
Resetting under ''L'' with
main power supply "'ON"'
AFC DEF (C02) AFC defeat output
VL (C03) Band switching output
VH (C04) ae
POWER ON (CO5) Power supply ''ON"' output
POWER OFF (CO6) | Power supply ''OFF'' output
9 _ CE (C07) Chip enable output
10 (C08) Program output
13 (VOW 1) On-screen display letter output
14 (HSYNC) H. sync signal input
: (negative polarity)
15 (VSYNC) V. sync signal input
LL egsive polarity)
AFC DEF
2
S
oc
ul
=
ro)
a
CLK (DOSC) Oscillation terminal for on-
screen display
GND (VSS) Grounding
(OSC 1) External-connection terminal
for CPU clock oscillation
(OSC2) circuit (500 kHz)
(TST) Sleep timer display output
BT (DAC1) Tuning DA converter output
VOL (DAC2) : | Sound-volume-controlling
DA converter output
(Al0 ~ Al3) 4-bit key scan input
TuH (BIO) } Tuning signal input {input
TuL (BI1) from pressetting comparator)
REM fhe! } Remote-controlled data input
REM2 (SNS1) :
(DOO ~DO3) 4-bit key scan output
(No. 5883) 3