Chipset Technology - Dell LATITUDE D620 User Manual

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Part of Intel's new Napa architecture is the 945GM and 945PM chipsets, code-named Calistoga. The difference between the
two chipsets is that the 945GM offers integrated graphics on the motherboard, but the 945PM uses a discrete solution. Part
of the Calistoga chipset is the new ICH7-M controller. Here are some of the features of these chipsets:
Enhanced graphics (945GM only) — Generation 3.5 integrated GFX core targeting 20 to 30 percent performance
increase over previous generation
Higher memory bandwidth — Data transfer rate is 20 percent higher with DDR2 667 MHz at low power
Intel Memory Pipeline Technology (MPT) — MPT accelerates CPU-to-memory read/writes for improved system
performance
New display and media features
Serial digital video output (SDVO) with lane reversal
Intermediate Z in classic rendering
Variable length decoding (VLD) / inverse discrete cosine transform (IDCT), 4x pixel rate hardware motion
compensation (HWMC)
Improved video quality with intelligent deinterlacing
Smaller footprint —37.5 x 37.5 mm, 6 percent foot printsavings
Mobile Eastfork Platform Driver — Support for the Eastfork software package when it becomes available
Advanced I/O and low power
Six PCI-E ports
RAID 0/1
USB2 C3 enhancements, saving power when HSUSB device is idle
Lower power — Targeting approximately 25 percent lower average power
BOM cost reduction — Flash sharing through serial peripheral interface (SPI), combining the BIOS for Gigabit
Ethernet (GbE) and the system BIOS, eliminating the firmware hub (FWHx) BIOS
The diagram below shows the Calistoga chipset and how it interacts with other peripherals.
Printed 2/22/2010 11:17:19 AM
Expires 2/23/2010 11:17:19 AM
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Latitude™ D620

Chipset Technology

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22/02/2010