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Dynamic Engineering PCIBPMCx2 User Manual

Pci 2 position pmc compatible carrier

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DYNAMIC ENGINEERING
150 Dubois St. Suite B&C, Santa Cruz, CA 95060
831-457-8891
https://www.dyneng.com
sales@dyneng.com
Est. 1988
User Manual
PCIBPMCx2
PCI 2 Position PMC Compatible Carrier
Revision 6 shown
Manual Revision 1p7 10/8/24
Corresponding Hardware: Revision 07
Fab number: 10-2005-0307

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Summary of Contents for Dynamic Engineering PCIBPMCx2

  • Page 1 DYNAMIC ENGINEERING 150 Dubois St. Suite B&C, Santa Cruz, CA 95060 831-457-8891 https://www.dyneng.com sales@dyneng.com Est. 1988 User Manual PCIBPMCx2 PCI 2 Position PMC Compatible Carrier Revision 6 shown Manual Revision 1p7 10/8/24 Corresponding Hardware: Revision 07 Fab number: 10-2005-0307...
  • Page 2 Dynamic Engineering has made every effort to ensure that this manual is accurate and complete. Still, the company reserves the right to...
  • Page 3 Table of Contents PRODUCT DESCRIPTION IDSEL Options PMC Module Backplane IO Interface Pin Assignment APPLICATIONS GUIDE Interfacing Construction and Reliability Thermal Considerations WARRANTY AND REPAIR Service Policy Out of Warranty Repairs For Service Contact: SPECIFICATIONS ORDER INFORMATION List of Figures Embedded Solutions Page 3...
  • Page 4 FIGURE 1 PCIBPMCX2 SLOT0 INTERRUPTS SCHEMATIC FIGURE 2 PCIBPMCX2 SLOT1 INTERRUPTS SCHEMATIC FIGURE 3 PCIBPMCX2 PN4 INTERFACE STANDARD Embedded Solutions Page 4...
  • Page 5 • Optional Fan(s) to increased airflow • JTAG programming support The PCIBPMCx2 is ready to use with the default settings. Just install the PMC onto the PCIBPMCX2 and then into the system. There are a few settings that can optimize performance.
  • Page 6 The VIO plane is a reference for the IO level. The specification does not prohibit larger current consumption from these pins. The PCIBPMCX2 design utilizes a MOSFET to control the 5V or 3.3V rails onto the VIO plane. Max consumption on the VIO rail is 3A.
  • Page 7 Position 7 is connected to the Monarch pin for slot 0. When open a 4.7K pull-up to VIO is used to control the Monarch signal [Pn2-64]. When closed the Monarch signal is set The factory setting is ‘1’. to gnd. Switch 2: GPIO The 4 positions on TP2 can be read in from the bridge via the configuration space registers.
  • Page 8 Dip Switch 8 pos SMT INTR_AI SWB8 SWA8 INTR_BI SWB7 SWA7 INTR_CI SWB6 SWA6 INTR_DI SWB5 SWA5 INTA_0 INTR_A SWB4 SWA4 INTB_0 INTR_B SWB3 SWA3 INTC_0 INTR_C SWB2 SWA2 INTD_0 INTR_D SWB1 SWA1 FIGURE 1 PCIBPMCX2 SLOT0 INTERRUPTS SCHEMATIC Embedded Solutions Page 8...
  • Page 9 SWA1 FIGURE 2 PCIBPMCX2 SLOT1 INTERRUPTS SCHEMATIC Please note that SW3 and SW4 are installed with pin one on the RHS when viewing the card with the PCI fingers down. SW3 DIP switch number 1 is on the RHS and DIP switch number 8 is on the LHS.
  • Page 10 The fan used has a relatively low noise rating for quiet operation. Positions are numbered left to right in the photo below. In addition, the PCIBPMCX2 has two options for Pn4 signal routing. VME style 2x32 pin header [shown] or a SCSI style connector.
  • Page 11 Pin C1 corresponds to the cable wire number 1 for a standard header inserted into the connector on the PCIBPMCX2. Cables and breakouts are available from Dynamic Engineering – Please see DINterm64 and DINribn64 products from the Dynamic Engineering website.
  • Page 12 The figure below gives the pin assignments for the PMC Module IO Interface – from Pn4 to the PCIBPMCx2 connectors. Also see the User Manual for your PMC board for more information. Please note that P2 or P3, P4 or P5 are installed not both.
  • Page 13 Power all system power supplies from one switch. Connecting external voltage to the PCIBPMCX2 when it is not powered can damage it, as well as the rest of the host system. This problem may be avoided by turning all power supplies on and off at the same time.
  • Page 14 FR4 material. Cooling cutouts have been designed into the product for improved air flow to the PMC sites. The components on the PCIBPMCX2 are tied into the internal power planes to spread the dissipated heat out over a larger area. This is an effective cooling technique in the situation where a large portion of the board has little or no power dissipation.
  • Page 15 For service on Dynamic Engineering Products not purchased directly from Dynamic Engineering contact your reseller. Products returned to Dynamic Engineering for repair by other than the original customer will be treated as out-of-warranty.
  • Page 16 Specifications Logic Interfaces: PCI Interface 33/32 <–> 66/32 Access types: PCI bus accesses CLK rates supported: 66, 33 MHz PCI clock rates Software Interface: transparent Bridge. Registers in configuration space. Unmodified PMC drivers and User software used to control installed devices. Initialization: Switch selections for VIO, secondary clock rates, special bridge based features and cable options...
  • Page 17 64 pin ribbon cable to to 64 screw terminal converter with DIN rail mounting. DINribn64 https://www.dyneng.com/DINribn64.html 64 pin ribbon cable with strain relief. Add –XX for number of inches. 36” is default. All information provided is Copyright Dynamic Engineering Embedded Solutions Page 17...