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Cisco 1600 Series Router Architecture.............................................................................................................1
Document ID: 5406 ..................................................................................................................................1
Introduction..........................................................................................................................................................1
Prerequisites.........................................................................................................................................................1
Requirements..........................................................................................................................................1
Components Used...................................................................................................................................1
Conventions............................................................................................................................................2
Hardware Overview.............................................................................................................................................2
Cisco 1601..............................................................................................................................................2
Cisco 1602..............................................................................................................................................2
Cisco 1603..............................................................................................................................................2
Cisco 1604..............................................................................................................................................2
Cisco 1605..............................................................................................................................................3
Block Diagram........................................................................................................................................3
Memory Details...................................................................................................................................................4
DRAM....................................................................................................................................................4
PCMCIA Flash.......................................................................................................................................5
NVRAM ..................................................................................................................................................5
BOOT ROM...........................................................................................................................................5
Registers ..................................................................................................................................................5
Sample Output........................................................................................................................................5
Boot Sequence.....................................................................................................................................................6
Packet Switching .....................................................................................................................................8
Switching Paths ..................................................................................................................................................10
1 − Receive the packet..........................................................................................................................10
2 − Switch the Packet . ...........................................................................................................................10
3 − Transmit the Packet........................................................................................................................11
NetPro Discussion Forums − Featured Conversations......................................................................................11
Related Information...........................................................................................................................................12
Cisco − Cisco 1600 Series Router Architecture
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Page 1: Table Of Contents
Cisco − Cisco 1600 Series Router Architecture Table of Contents Cisco 1600 Series Router Architecture......................1 Document ID: 5406 ..........................1 Introduction................................1 Prerequisites.................................1 Requirements............................1 Components Used...........................1 Conventions............................2 Hardware Overview.............................2 Cisco 1601..............................2 Cisco 1602..............................2 Cisco 1603..............................2 Cisco 1604..............................2 Cisco 1605..............................3 Block Diagram............................3 Memory Details..............................4 DRAM..............................4... -
Page 2: Cisco 1600 Series Router Architecture
3 − Transmit the Packet NetPro Discussion Forums − Featured Conversations Related Information Introduction This document provides an overview of the hardware and software architecture of the Cisco 1600 Series Routers. Prerequisites Requirements There are no specific requirements for this document. -
Page 3: Conventions
Conventions For more information on document conventions, refer to the Cisco Technical Tips Conventions. Hardware Overview Cisco 1600 Series Routers are composed of these router models: Cisco 1601 and 1601REthernet/Serial Modular Router Cisco 1602 and 1602REthernet/Serial Modular Router with 56K CSU/DSU (4−wire) -
Page 4: Cisco 1605
ProcessorThe processor used in the 160x Series is the Motorola 68360 Complex Instruction Set Computer (CISC). The main job of the processor is to load instructions defined in Cisco IOS® software from PCMCIA Flash or from RAM (for the R models) and execute them, which basically involves some manipulation of data. -
Page 5: Memory Details
Power supplyPower supply provides power to various components of the router. Memory Details Different kinds of memory reside in the Cisco 1600 Series Router, and each of them is handled in a different way and for different purposes. Figure 7 Memory Details DRAM DRAM is logically divided into Main Processor memory and Shared Input/Output (I/O) memory. -
Page 6: Pcmcia Flash
MB. If SIMM is with parity, total DRAM can be up to 16 MB (on−board 2 MB will be disabled). Note: The Cisco 1605−R Series Router has 8 MB on−board. Therefore, total DRAM can be up to 24 MB on that router. -
Page 7: Boot Sequence
For more information, see Comparison of Cisco 1601−Cisco 1604 and Cisco 1605−R Memory Architectures. Boot Sequence All Cisco products do not have the same components or mechanisms to boot. This section describes the boot sequence in the Cisco 1600 Series Router. - Page 8 RxBoot analyzes the hardware. Based on the configuration register value, the router either stays in RxBoot, or the Cisco IOS software image file (default, or as defined in the startup configuration) is executed from PCMCIA Flash or RAM (or moved there from the network). This main Cisco IOS software image analyzes the hardware again.
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Page 9: Packet Switching
Private buffer pools are static, and are allocated with a fixed number of buffers during initialization of the Cisco IOS software. New buffers cannot be created on demand for these pools. If a buffer is needed, and none Cisco − Cisco 1600 Series Router Architecture... - Page 10 Cisco IOS software falls back to the public buffer pool for the size that matches the maximum transmission unit (MTU) of the interface. Receive Rings and Transmit Rings Cisco IOS software creates these rings on behalf of the media controllers and then manages them jointly with the controllers.
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Page 11: Switching Paths
(unless the no ip route−cache command is configured on the interface), and finally, process switching if none of the others work. Step 5: While still in the receive interrupt context, the Cisco IOS software attempts to use the CEF table or the fast switching cache to make a switching decision. Switching can be: 5.1: CEF switchingIf there are valid CEF and adjacency table entries, the Cisco IOS software... -
Page 12: Transmit The Packet
3 − Transmit the Packet Step 8: If the packet was CEF or fast switched, the Cisco IOS software checks to see if there are packets on the output queue of the outbound interface, while still in receive interrupt context. -
Page 13: Related Information
Maximum Number of Interfaces and Subinterfaces for Cisco IOS Platforms: IDB Limits Cisco 1600 Series Product Support Page Technical Support − Cisco Systems All contents are Copyright © 1992−2005 Cisco Systems, Inc. All rights reserved. Important Notices and Privacy Statement. Updated: Feb 14, 2005 Document ID: 5406...