ЗЕСТІОМ
4
CIRCUIT DESCRIPTION
4-1 RECEIVER CIRCUITS
4-1-1 ANTENNA SWITCHING CIRCUIT
(MIN AND APC UNITS)
Received
signals enter the antenna
connector
and pass
through a low-pass filter (L2~L4, C21~C25).
Тһе signals
are applied to the antenna switching circuit (D7, D9, L5,
L6, and C26~C28) and then to the RF UNIT via the RFIN
signal
line.
The
antenna
switching
circuit
employs
a
two-stage A/4-type diode switching system.
The
antenna
switching
circuit
functions
as
a low-pass
filter while in receiving and becomes very high impedance
while in transmitting.
4-1-2 RF CIRCUIT (RF UNIT)
The
signals
from
the
antenna
switching
circuit
pass
through a bandpass
filter (L1, D2), and are applied to
the RF amplifier (Q1, Q2).
Amplified
signals
are
reapplied
to the other
bandpass
filter (L2,
L3,
D4,
D5) to suppress
unwanted
signals.
The signals are applied to the 1st mixer circuit (MIN
UNIT Q1).
D2, D4 and D5 are varactor diodes that track the band-
pass filters and are controlled by the PLL lock voltage.
These diodes tune the center frequency of the bandpass
filters
for
wide
bandwidth
reception
and
good
image
response rejection.
4-1-3 1ST MIXER CIRCUIT (MIN UNIT)
The signals from the RF circuit are mixed with the 1st LO
signal from the PLL UNIT to produce a 30.875
MHz
1st
IF signal.
RECEIVER CIRCUIT BLOCK DIAGRAM
Ы NDER
ke
Tana
ІСІ,
IC2
СРУ ü BUSY
DET UNIT
4-1-4 1ST IF CIRCUIT (MIN AND DET UNITS)
After passing through the matching circuit (L1), the 1st IF
signal is applied to a pair of crystal filters (F11) to suppress
out-of-band
signals.
The
1st
IF signal
enters
the DET
UNIT and is amplified at the IF amplifier (Q2) and then
applied to the 2nd mixer circuit.
4-1-5 2ND IF AND DEMODULATOR
CIRCUITS (DET UNIT)
The
1st IF signal from
Q2 is applied to the 2nd
mixer
section of IC1, and is mixed with the 2nd LO signal to be
converted to a 455 kHz 2nd IF signal.
IC1
contains
the
2nd
mixer,
local
oscillator,
limiter
amplifier
and
quadrature
detector
circuits.
Тһе
local
oscillator
section
and
X2
generate
30.42
MHz
for the
2nd LO signal.
The 2nd IF signal from the 2nd mixer (IC1, pin 4) passes
through the ceramic filter, Fl1, where unwanted signals
are suppressed.
Itis then amplified at the limiter amplifier
section (IC1, pin 6) and applied to the quadrature detector
section
(IC1, pin 10 and ceramic
discriminator
X1) to
demodulate the 2nd IF signal into an AF signal.
AF signal output from IC1 pin 11 is applied to the squelch
circuit and de-emphasis
circuit (R7, C24, C25).
This de-
emphasis
circuit
is an
integrated
circuit with frequency
characteristics of —6 dB/octave.
The resulting signal is
applied to the AF amp, optional tone squelch and optional
DTMF decoder circuits.
30.42 MHz
PLL UNIT
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