Icom IC-2SA Service Manual page 11

4-5-3 SUBAUDIBLE TONE ENCODER
CIRCUIT
This function can be activated only when an optional
UT-50 TONE SQUELCH UNIT or UT-51 PROGRAMMABLE
TONE ENCODER UNIT is installed.
A tone signal is applied to the splatter filter circuit on
the MIC UNIT via the TONE signal line. R10 on the
UT-50 and R5 on the UT-51 adjust the subaudible tone
deviation.
4-5-4 DTMF ENCODER CIRCUIT (LGC UNIT)
This function can be activated only when the matrix
KEYS1—KEYI1 is OPEN. (an optional UT-49 ОТМЕ
DECODER UNIT is installed.)
Pins 70 and 71 of the CPU (TONEC/TONER) output
a DTMF code signal. R16 adjusts the DTMF code signal
deviation. The signal is also output to the AF UNIT via
R17.
4-5-5 DISPLAY BACKLIGHT CIRCUIT
(LGC UNIT)
When the [LIGHT] switch is pushed, pin 77 of the CPU
outputs "HIGH." The signal is applied to Q1 to light up
the backlight LEDs (DS2, DS3).
4-5-6 CPU RESET CIRCUIT (LGC UNIT)
IC3 detects +5 voltage. When the +5 voltage line
becomes 5 У, ІСЗ turns INTO "HIGH" and the CPU (ІСІ)
restarts operation.
The CPU is reset when IC1 pin 76 becomes "HIGH."
The AND gate ІС (ІС4) outputs a reset signal when
both input terminals are "HIGH." One terminal is
"HIGH" when the [MONI] switch is pushed and the
other (INTO line) is "HIGH" when the power is turned ON.
RESET CIRCUIT
+5
[MONI]
Fig. 5
a
4-5-7 TRANSMIT/RECEIVE INDICATOR
CIRCUIT (LGC UNIT)
The transmit/receive indicator (DS4) uses a 2-input LED
and lights up in red or green.
The indicator lights up in red as the transmit indicator
while transmitting using the T+5 voltage.
The indicator lights up in green as the busy indicator
while the squelch opens using CPU pin 78 output via
the inverter (Q2).
4-5-8 CLOCK OSCILLATOR CIRCUIT
(LGC UNIT)
IC1 oscillates the 798.642 kHz CPU system clock signal
using X1. ІСІ oscillates the 32.768 kHz clock signal for
the built-in clock using X2.
4-6 CPU PORT ALLOCATIONS
(LGC UNIT)
* INPUT PORT
PIN
PORT NUMBER NUMBER DESCRIPTION
D4 1 Inputs a signal on the PTT line.
[PTT] This port becomes "LOW" when
the PTT switch is pushed.
D5 2
[SIN]
і
from IC2b to indicate the CPU
counting level to the S-indicator in
the function display.
Detects a PLL unlock signal.
When the signal is "HIGH," the PLL
is unlocked.
Inputs S-meter-compared signal
[UL]
011 Detects Vcc voltage.
[BATT]
D12, D13 Input port for the up/down signal of
[DIAL the tuning control.
UP/DN]
R10—R13 19—22 | These are input ports for the initial
[KEYIO~ and key matrices.
KEYI3]
R20~R23 23~26 | These are input ports for the DTMF
[KEYRO~ code from the UT-49.
KEYR3]
R30
[BUSY]
Detects a squelch signal. The
signal is "HIGH" when the squelch
opens.
ы
Ш
R32 29
[INTO] `
R33 30
[INT1]
5
R31
[ОРТ]
Input port for an optional unit.
This port becomes "НІСН" when
the tone squeich opens. (UT-50)
This port becomes "LOW" when
the UT-51 is installed.
Detects a signal for the standby
mode of the CPU. The CPU enters
the standby mode when the port
becomes "LOW."
The CPU decodes received DTMF
code when this port becomes
"LOW."