Cypress Semiconductor enCoRe III CY7C64215 Manual

Full speed usb controller

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Features

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Powerful Harvard Architecture Processor

❐

M8C Processor Speeds to 24 MHz

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Two 8x8 Multiply, 32-bit Accumulate

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3.0V to 5.25V Operating Voltage

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USB 2.0 USB-IF certified. TID# 40000110

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Operating Temperature Range: 0°C to +70°C

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Advanced Peripherals (enCoRe™ III Blocks)

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6 Analog enCoRe III Blocks provide:

• Up to 14-bit Incremental and Delta-Sigma ADCs

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Programmable Threshold Comparator

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4 Digital enCoRe III Blocks provide:

• 8-bit and 16-bit PWMs, timers and counters

• I

C Master

• SPI Master or Slave

• Full Duplex UART

• CYFISNP and CYFISPI modules to talk to Cypress CYFI

radio

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Complex Peripherals by Combining Blocks

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Full-Speed USB (12 Mbps)

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Four Unidirectional Endpoints

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One Bidirectional Control Endpoint

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Dedicated 256 Byte Buffer

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No External Crystal Required

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Operational at 3.0V – 3.6V or 4.35V – 5.25V

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Flexible On-Chip Memory

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16K Flash Program Storage 50,000 Erase/Write Cycles

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1K SRAM Data Storage

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In-System Serial Programming (ISSP)

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Partial Flash Updates

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Flexible Protection Modes

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EEPROM Emulation in Flash

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Programmable Pin Configurations

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25-mA Sink on all GPIO

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Pull up, Pull down, High- Z, Strong, or Open Drain Drive

Modes on all GPIO

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Configurable Interrupt on all GPIO

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Precision, Programmable Clocking

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Internal ±4% 24 and 48 MHz Oscillator

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Internal Oscillator for Watchdog and Sleep

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0.25% Accuracy for USB with no External Components

Cypress Semiconductor Corporation

Document 38-08036 Rev. *C

enCoRe™ III Full Speed USB Controller

■

Additional System Resources

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Watchdog and Sleep Timers

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User-Configurable Low Voltage Detection

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Integrated Supervisory Circuit

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On-Chip Precision Voltage Reference

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Complete Development Tools

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Free Development Software (PSoC

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Full-Featured, In-Circuit Emulator and Programmer

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Full Speed Emulation

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Complex Breakpoint Structure

❐

128K Bytes Trace Memory

Block Diagram

•

198 Champion Court

C™ Slave, Master, and Multi-Master to 400 kHz

enCoRe III Core

•

San Jose

CA 95134-1709

CY7C64215

Designer™)

•

408-943-2600

Revised December 08, 2008

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Summary of Contents for Cypress Semiconductor enCoRe III CY7C64215

Page 1: Block Diagram
Features ■ Powerful Harvard Architecture Processor ❐ M8C Processor Speeds to 24 MHz ❐ Two 8x8 Multiply, 32-bit Accumulate ❐ 3.0V to 5.25V Operating Voltage ❐ USB 2.0 USB-IF certified. TID# 40000110 ❐ Operating Temperature Range: 0°C to +70°C ■ Advanced Peripherals (enCoRe™...
Page 2 Applications ■ PC HID devices ❐ Mouse (Optomechanical, Optical, Trackball) ❐ Keyboards ❐ Joysticks ■ Gaming ❐ Game Pads ❐ Console Keyboards ■ General Purpose ❐ Barcode Scanners ❐ POS Terminal ❐ Consumer Electronics ❐ Toys ❐ Remote Controls ❐ USB to Serial enCoRe III Functional Overview The enCoRe III is based on flexible PSoC architecture and is a...
Page 3: Getting Started
The Analog System The Analog System is composed of six configurable blocks, comprised of an opamp circuit allowing the creation of complex analog signal flows. Analog peripherals are very flexible and are customized to support specific application requirements. enCoRe III analog function supports the Analog-to-digital converters (with 6 to 14-bit resolution, selectable as Incremental, and Delta Sigma) and programmable threshold comparator).
Page 4: Development Kits
with detailed programming information, reference the PSoC™ Mixed-Signal Array Technical Reference Manual. For up-to-date Ordering, Packaging, and Electrical Specification information, reference the latest enCoRe III device data sheets on the web at http://www.cypress.com. Development Kits Development Kits are available from the following distributors: Digi-Key, Avnet, Arrow, and Future.
Page 5: Hardware Tools
Application Editor In the Application Editor you can edit your C language and Assembly language source code. You can also assemble, compile, link, and build. Assembler. The macro assembler allows the assembly code to merge seamlessly with C code. The link libraries automatically use absolute addressing or is compiled in relative mode, and linked with other software modules to get absolute addressing.
Page 6: Device Editor
Each user module establishes the basic register settings that implement the selected function. It also provides parameters that allow you to tailor its precise configuration to your particular application. For example, a Pulse Width Modulator User Module configures one or more digital PSoC blocks, one for each 8 bits of resolution.
Page 7: Document Conventions
Document Conventions Acronyms Used The following table lists the acronyms that are used in this document. Acronym Description alternating current analog-to-digital converter application programming interface central processing unit continuous time external crystal oscillator EEPROM electrically erasable programmable read-only memory full scale range GPIO general purpose IO graphical user interface...
Page 8 56-Pin Part Pinout The CY7C64215 enCoRe III device is available in a 56-pin package which is listed and illustrated in the following table. Every port pin (labeled “P”) is capable of Digital IO. However, Vss and Vdd are not capable of Digital IO. Table 2.
Page 9 28-Pin Part Pinout The CY7C64215 enCoRe III device is available in a 28-pin package which is listed and illustrated in the following table. Every port pin (labeled with a “P”) is capable of Digital IO. However, Vss and Vdd are not capable of Digital IO. Table 3.
Page 10: Register Reference
Register Reference The register conventions specific to this section are listed in the following table Table 4. Register Conventions Convention Description Read register or bit(s) Write register or bit(s) Logical register or bit(s) Clearable register or bit(s) Access is bit specific Document 38-08036 Rev.
Page 11 Register Map Bank 0 Table: User Space Name Addr (0,Hex) Access Name PMA0_DR PRT0DR PMA1_DR PRT0IE PMA2_DR PRT0GS PMA3_DR PRT0DM2 PMA4_DR PRT1DR PMA5_DR PRT1IE PMA6_DR PRT1GS PMA7_DR PRT1DM2 USB_SOF0 PRT2DR USB_SOF1 PRT2IE USB_CR0 PRT2GS USBIO_CR0 PRT2DM2 USBIO_CR1 PRT3DR PRT3IE EP1_CNT1 PRT3GS EP1_CNT PRT3DM2...
Page 12 Register Map Bank 1 Table: Configuration Space Addr Name Access Name (1,Hex) PRT0DM0 PMA0_WA PRT0DM1 PMA1_WA PRT0IC0 PMA2_WA PRT0IC1 PMA3_WA PRT1DM0 PMA4_WA PRT1DM1 PMA5_WA PRT1IC0 PMA6_WA PRT1IC1 PMA7_WA PRT2DM0 PRT2DM1 PRT2IC0 PRT2IC1 PRT3DM0 PRT3DM1 PRT3IC0 PRT3IC1 PRT4DM0 PMA0_RA PRT4DM1 PMA1_RA PRT4IC0 PMA2_RA PRT4IC1...
Page 13: Electrical Specifications
Electrical Specifications This section presents the DC and AC electrical specifications of the CY7C64215 enCoRe III. For the most up to date electrical specifications, confirm that you have the most recent data sheet by going to the web at http://www.cypress.com. Specifications are valid for 0°C <...
Page 14: Absolute Maximum Ratings
Table 5. Units of Measure (continued) Symbol Unit of Measure μV microvolts μVrms microvolts root-mean-square Absolute Maximum Ratings Table 6. Absolute Maximum Ratings Parameter Description Storage Temperature Ambient Temperature with Power Applied Supply Voltage on Vdd Relative to Vss DC Input Voltage DC Voltage Applied to Tri-state Maximum Current into any Port Pin Maximum Current into any Port Pin...
Page 15: Dc Electrical Characteristics
DC Electrical Characteristics DC Chip-Level Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 8.
Page 16 DC Full-Speed USB Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 10.
Page 17 Table 12. 3.3V DC Analog Output Buffer Specifications Parameter Description Input Offset Voltage (Absolute Value) OSOB Average Input Offset Voltage Drift OSOB Common-Mode Input Voltage Range CMOB Output Resistance OUTOB Power = Low Power = High High Output Voltage Swing OHIGHOB (Load = 1K ohms to Vdd/2) Power = Low...
Page 18 Table 14. 3.3V DC Analog Reference Specifications Parameter Description Bandgap Voltage Reference – AGND = Vdd/2 – AGND = 2 x BandGap – AGND = P2[4] (P2[4] = Vdd/2) – AGND = BandGap – AGND = 1.6 x BandGap – AGND Column to Column Variation (AGND = Vdd/2) –...
Page 19 DC POR and LVD Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T design guidance only. Note The bits PORLEV and VM in the table below refer to bits in the VLT_CR register.
Page 20 DC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 17. DC Programming Specifications Parameter Description Supply Current During Programming or...
Page 21: Ac Electrical Characteristics
AC Electrical Characteristics AC Chip-Level Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 18.
Page 22 AC General Purpose IO Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 19.
Page 23 AC Digital Block Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 21.
Page 24 AC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 23.
Page 25 AC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and 0°C < T < 70°C, or 3.0V to 3.6V and 0°C < T for design guidance only. Table 25. AC Programming Specifications Parameter Description Rise Time of SCLK...
Page 26 CY7C64215 Figure 8. Definition for Timing for Fast/Standard Mode on the I C Bus SPI2C LOWI2C SUDATI2C HDSTAI2C BUFI2C SUSTOI2C SUSTAI2C HDDATI2C HDSTAI2C HIGHI2C Document 38-08036 Rev. *C Page 26 of 30 [+] Feedback [+] Feedback...
Page 27: Packaging Information
Packaging Information This section illustrates the package specification for the CY7C64215 enCoRe III, along with the thermal impedance for the package. Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of emulation tools’...
Page 28 Figure 10. 28-Pin Shrunk Small Outline Package Thermal Impedance Table 27. Thermal Impedance for the Package Package 56 Pin MLF 28 Pin SSOP + POWER x θ Solder Reflow Peak Temperature Following is the minimum solder reflow peak temperature to achieve good solderability. Table 28.
Page 29: Package Handling
Package Handling Some IC packages require baking before they are soldered onto a PCB to remove moisture that may have been absorbed after leaving the factory. A label on the packaging has details about actual bake temperature and the minimum bake time to remove this moisture. The maximum bake time is the aggregate time that the parts are exposed to the bake temperature.
Page 30 Document History Page Description Title: CY7C64215, enCoRe™ III Full Speed USB Controller Document Number: 38-08036 Submission Rev. ECN No. Date 131325 See ECN 385256 See ECN 2547630 08/04/08 2620679 12/12/08 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors.

Cypress Semiconductor enCoRe III CY7C64215 Manual

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