9-4-11 Bootstrap
BS0
9
BS0
BS1
6
BS1
BS2
6
BS2
BS3
6
BS3
BS4
6
BS4
BS8
6
BS8
BS9
6
BS9
BS12
6,14
BS12
BS13
6
BS13
BS15
6
BS15
BS18
6
BS18
BS19
6
BS19
BS21
6,13
BS21
B3.3V_PW
R8308
NC
R8309
NC
R8310
NC
R8311
NC
R8331
10K
A3.3V_PW
R8313
NC
R8314
NC
R8315
NC
R8316
NC
R8317
NC
R8318
1K OHM 1%
R8319
1K OHM 1%
R8320
NC/1K OHM 1%
6,13
B S 9 _ S e c u r i t y
b o o t
0 :
n o
s e c u r i t y
b o o t
1: security boot
B S 1 0 _ S P I
F l a s h
s c r a m b l e
0 :
D i s a b l e
1: Enable
B S 1 1 _ T u r n k e y
S e c u r i t y
0 :
D i s a b l e
1: Enable
BS0
R8296
10K
BS1
R8328
10K
BS2
R8329
10K
BS4
R8330
10K
BS8
R8312
NC
BS12
R8323
10K
BS13
R8324
10K
BS15
R8325
10K
BS18
R8326
10K
BS19
R8327
10K
BS3
R8321
NC/10K
BS9
R8322
NC/10K
e M
M C :
BS21
BS21
B S 1 3 _ e M M C
I n t e r n a l
Bootstrap
B S 1 3
0: EMMC Bus width is 8 bit
1: EMMC Bus width is 4 bit
B S 1 5 _ e M M C
0 :
B o o t
1: Boot mode do not
wait ACK
B S 1 8 _ E M M C
0 :
2 6 M
1: 13M
C P U
S i d e :
B S 0 _ B y p a s s
C P U
M a s k R O M
0
:
U s i n g
C P U
M a s k R O M
1 : Bypass CPU MaskROM
S T B C
S i d e :
B S 1 _ S T B C
B o o t
S t r a p
O p t i o n
0 :
B o o t
f r o m
S T B C
1: Boot from CPU, bypass STBC.
B S 8 _ S T B C
w a t c h d o g
0 :
D e f a u l t
d i s a b l e
S T B C
w a t c h d o g
1: Default enable STBC watchdog
B S 1 9 _ I n t e r n a l
b o o t
s t r a p
f o r
N F / e M M C
t y p e
0 :
N F / e M M C
t y p e
i n t e r n a l
b o o t
s t r a p
e n a b l e
1: NF/eMMC type internal boot strap disable
(BS[7:6] = 00, BS8 is external; BS[17:16]=00,BS14=0, BS13,BS15,BS18
are external)
b u s
w i d t h
=
A C K
m o d e
w a i t
A C K
c l k _ s w i t c h
B S 1 2 = 0
,
B S 3 , B S 4 _ D e v i c e
00: STBC boot from SPI, CPU boot from eMMC
B S 4 ,
3
=
01: STBC & CPU both boot from eMMC
10: STBC & CPU both boot from SPI
B S 2 _ B y p a s s
S T B C
M a s k R O M
0: Through STBC MaskROM
W h e n
B S 1 = 0 ,
1: Bypass STBC MaskROM
Need help?
Do you have a question about the 55PML9008/12 and is the answer not in the manual?
Questions and answers