Texas Instruments TPS62830 DRLEVM Series User Manual

www.ti.com
User's Guide
TPS62830xDRLEVM Evaluation Module
This user's guide describes the characteristics, operation, and use of TI's TPS62830xDRL evaluation modules
(EVM). These EVMs are designed to help the user to easily evaluate and test the operation and functionality
of the TPS628301A, TPS628303A, TPS628303B and TPS628304A buck converters in their SOT583 package.
The EVMs convert a 2.25-V to 5.5-V input voltage to a regulated 1.8-V output voltage. This user's guide includes
setup instructions for the following:
• Hardware
• A printed-circuit board (PCB) layout
• Schematic diagram
• Bill of materials (BOM)
• Test results of the EVM
Throughout this document, the TPS62830xDRLEVM is used as an abbreviation representing the
TPS628301ADRLEVM, TPS628303ADRLEVM, TPS628303BDRLEVM and TPS628304ADRLEVM.
1 Warning and Caution..............................................................................................................................................................2
2 Introduction.............................................................................................................................................................................2
2.1 Performance Specification.................................................................................................................................................
2.2 Dual Package Layout.........................................................................................................................................................
2.3 Modifications......................................................................................................................................................................
3 Setup........................................................................................................................................................................................3
3.1 Connector Descriptions......................................................................................................................................................3
3.2 Hardware Setup.................................................................................................................................................................
4 TPS62830xDRLEVM Test
5 Board Layout...........................................................................................................................................................................4
6 Schematic and Bill of Materials.............................................................................................................................................7
6.1 Schematic..........................................................................................................................................................................
6.2 Bill of Materials...................................................................................................................................................................8
7 Revision History......................................................................................................................................................................9
Figure 2-1. Overlapped QFN and SOT583
Figure 5-1. Top Assembly............................................................................................................................................................
Figure 5-2. Top Layer...................................................................................................................................................................4
Figure 5-3. Signal Layer 1...........................................................................................................................................................
Figure 5-4. Signal Layer 2...........................................................................................................................................................
Figure 5-5. Bottom Layer.............................................................................................................................................................
Figure 5-6. Bottom Assembly......................................................................................................................................................
Figure 6-1. TPS628303ADRLEVM Schematic............................................................................................................................
Table 2-1. Performance Specification
Table 6-1. TPS62830xDRLEVM Bill of
Trademarks
All trademarks are the property of their respective owners.
SLUUCR8A - JANUARY 2023 - REVISED DECEMBER 2023
Submit Document Feedback
ABSTRACT

Table of Contents

Results..........................................................................................................................................3
List of Figures
Footprints.................................................................................................................2
List of Tables
Summary..........................................................................................................................2
Materials.........................................................................................................................8
Copyright © 2023 Texas Instruments Incorporated
Table of Contents
TPS62830xDRLEVM Evaluation Module
2
2
3
3
7
4
5
5
6
6
7
1