Section 3. System Board; Arbitration-Bus Priority Assignments; System-Memory Map; Rt/Cmos Address And Nmi Mask Register (Hex 0070) - IBM Personal System/2 65 SX Technical Reference

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Section 3. System Board
Description
.......
0...
22.
Microprocessor and Math Coprocessor
| Micro Channel Implementation
|
Exception Reporting
Central Arbiter
........
0.0.00...
00 0.
cee
een
Arbitration-Bus Priority Assignments
Central-Arbiter Programming
Micro Channel Connectors
Diskette-Drive Controller
Memory
... 2...
2.00.
es
ROM Subsystem
RAM Subsystem
Error Recovery
..........
0.0.0
eee
ees
System-Memory Map
...................000
002
System-Board Memory Connectors
RT/CMOS RAM
...........
0.00. 0c ee
eee
RT/CMOS Address and NMI Mask Register (Hex 0070)
RT/CMOS Data Register (Hex 0071)
RT/CMOS RAM I/O Operations
..................
Real-Time-Clock Bytes (Hex 000-00D)
CMOS RAM Configuration
..................05.
Miscellaneous System Functions and Ports
Nonmaskable Interrupt
........-..........
0.000005
System-Control Port B (Hex 0061)
System-Control Port A (Hex 0092)
Power-On Password
...........
0.00000 eee
Type 2 Serial-Port Controller
Hardware Compatibility
© Copyright 1BM Corp. 1989, 1990

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