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CIRCUIT
4
SECTION
DESCRIPTION
4.1
LOGIC
NOTATION
AND TERMINOLOGY
To
avoid confusion
in
determining
logic states,
please
read
and understand
the following
ground
rules
used
in
this
manual.
1.
On
the schematics,
all
signals
are true
when
high
unless
their
mnemonics
are
overscored; the overscore
indicates
true-when-low.
2.
Pulse
and
clock
refer
to transient
change
of
state,
whereas
status refers to a logic state
which
requires
new
input to change.
4.2
BASIC
OPERATION
The
overall
operation can be
easily
followed
in
Figure
4-1.
All digital
programmed
inputs are
via
the
keyboard
or the
remote ASCII
connector.
Two
input
BNC
connectors
are
for
the
TRIG
IN
and
VCG
(voltage
control of generator) IN
signals.
The
outputs
are selectable
*\,
,
,
_f]_
or
_/l waveform
at the
50£2
OUT
BNC.
A
sync
output
BNC
is
also
provided
for a
TTL
compatible
square wave.
The
integrator
and comparator and
hysteresis switch, acting
upon
each
other, generate the basic
waveforms
of square
and
triangle.
The
mode
of operation
(triggered,
gated or
continuous)
is
logic
controlled to act
upon
the
integrator.
Logic controls capacitance
for
generator
frequency
range
and
current,
via a
D/A
converter
and
VCG
amplifier, for
specific
frequency
in
the
selected range.
VCG
IN
voltage
will
also
control frequency.
Diode
arrays
in
the
sine
converter
form
the
sine
wave, and
the square
wave
multiplexes the
triangle
wave and
a
voltage
level
to
form
the
ramp
waveform.
The
waveform
to
be
output
is
selected
and
multiplied
with
the
selected
amplitude,
after
which
it is
offset
and
attenuated
as
programmed.
The
digital
control data
is
multiplexed
into
the display
bus
for display panel illumination.
4.3
INPUT/OUTPUT
Seven-bit
ASCII
characters
(see
Table
2-2
and Drawing
158-
200)
and
clock pulses
are
supplied to
an
ASCII
data bus
on
the
digital
board
thru the
ASCII
DATA
IN/OUT
connec-
tor
or supplied
by
the
keyboard
to the
digital
board.
(Generators with options
will
accept
and
convert other data
formats.
Once
converted, the data
is
placed
on
the
ASCII
data
bus.)
The
character
bits
are
0
to
0.4
volt for a
binary
1
and
>
2.4V,
<
5.0V
or
open
for
a
binary
0.
The
character
bits
are designated
DO
thru
D6
and
prefixed
as
to
their
type;
i.e.,
Xfor
in/out external,
K
for
keyboard,
and
OPT
for optional
interface
conversion.
The
ASCII
data bus
is
that
set
of eight
lines
handling
DO
thru
D6
and
CLK.
Keyboard
input
J2
is
always
a
part of
the
bus
as well as
the termination socket
XIC41
(shown
in
Drawing
158-218, Sheet
1).
Non-ASCII
signals
to the
generator
are
VCG
IN,
which
is
connected
to
the analog
board
via
the
digital
board,
and
TRIG
IN,
which
goes
to
the
trigger logic
on
the
digital
board.
The
generator
main output
signal
is
from
the analog
board
to
the
rear
panel
50J2
OUT
BNC
connector;
this
signal
is
a selectable
^
\
,
JL
or
-/I.
that
can
be
offset,
inverted
and
varied
in
amplitude.
The
SYNC
OUT
signal
is
a
fixed
amplitude square
wave
that
is
TTL
com-
patible.
4.4
INTERFACE
(Drawing 158-218, Sheet
1)
By means
of
jumpers (Drawing 158-218, Sheet
1),
the
standard
model
signals
bypass
the option card
connector
J4,
allowing
J9
(ASCII
DATA
IN/OUT)
to
be
connected
directly
to the
ASCII
data
bus.
The
ASCII
data bus
may
extend
thru
several
instruments.
In
any
case,
the
integrated
circuit
ter-
mination pack should be
inserted
only
once on
the
ASCII
data bus
and
at
the
far
end
of the
bus
from
the
keyboard
or control device.
4.5
KEYBOARD
(Drawing 159-216)
The
keyboard
transmits pressed-key data plus
a
clock pulse
to
the
ASCII
data
bus.
Proper time alignment of the
seven
data
bits
and
clock
is
maintained
by
the
IC9 clock
circuit
driving IC5,
a
binary counter, to generate
a
time
code.
The
4-1
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