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desc ribes the fu
i
This
s
e c t
o n
and
eleme nts
thei r relationships
figure 4-1 ,
s hown
fu nctional
in
lowing
sections i n thi s
manua l
i n formation for mainta i n i ng the
As
fi
e 4-1 ,
shown i n
g
u
r
the VCG
ag
Generator) sums vo l t
e i nputs
ia
and
VCG I N
d
l
the
connector.
t rols
the
mag n i tude
of
and
sou rce
cu rrent sink . T h i s cu rrent
2 mA
f rom approximately
to
. 004) range
a 1 0,000:1
o r l og a r ithmically
to 0.2 �
2
over
ma
frequency
each
mu ltiplier. The .VCG
trigger baseline compensation
of
another
s i n k
c u rrent
magn itude .
gate, control led by the comparator
The diode
connects
the
either
c u rrent
the
capac itor selected
to
t i m i n g
the cu rrent
m u l tiplier. When
the tim ing.
c h a rg e o n
capaci tor
ducing
c
trian g le
the positlve-goin g
sink p
the negative-going
e s
c u rrent
rodu
slope
.
The
a
g
e
amplifier is
a
t ri
n
l
ou tput
the
compa rator and to
i s fed
to
a
operates
c o
r a t o
cu its. The
m p
r
points set
with l i mit
to the t r
back to the d i ode gate and
output is
sent
the
ci
rcuits.
When
ou tput
the
positive-going u nt i l
the +
comparator output swi tches to
output i s
2V, the t riang l e
-
Is
and the compa ra tor
, . 25V
l imit
reac hed
switches back to
-
2V,
+
repea t i n g
the basic fu nction
m a n n e r ,
4-1 , p roduces simultaneous gene ration
path in
of
f i g u re
waves at
and
square
triangle
The ou tput frequency
determined by the
is
Scans by Artekmedia
j
o
ncti
o
n s o f m
a
r c i rcuit
to one another
as
diag r a m . The
fol
b lock
deta i led
provide more
instru ment.
(Voltage
Co
of
n t r ol
from
the frequency
a
This
voltage
sum
con
complementa ry
va ries
i
a
i
c u r re n t
l
n e
r
l
2
1 000: 1 (4.0
to
pA over a
approximately
from
(4.0 to
of
. 0004) range
also
the
con t rols
which consists
c i rc u i t ,
at
twice
the
current
output,
the c u rrent
source
o r
s i n k
e
b y the f requency
i n , the
s ou r
c
is switched
will
pro
rise Iinea rily,
slope. Likew ise, t he
triang le
whose
unity
the
gain ampl ifie r
output
c i r
ec
as
a
w i ndow det
tor
i
to
The
2V
±
a n
g l e peaks.
the output
2V, the ·triangle
is
+
is
reached and
1 . 25V limit
i s
2V.
the
When
-
the
is negative-going unti l
outp u t
I n this
the
process.
loop, the
b o l d
gene rator
the
frequ ency.
same
magnitude
2011
=>
CIRCUIT DESCRIPTION
t
i m i
of the
n
g ca pac itor
mu ltipl i e r sw i tches
and by the magn itude
rents
p
d
a nd
to
su
pl ie
r
rents a re lineari ly p
so
be
i n puts,
w i l l
the outpu t
To exte nd the lower f requency
VCG
a
generator,
capac itance multipl i e r
cu rrents by 1 0
by 1 0) for e a ch of the
y
capac itor
ranges.
The TIL
sq u a re from
sent to
SYNC OUT TIL connector. The other side
the
produce
is sent
the trigge r
to
2V
±
the
bipola r squa re
and
sq uare shaper
the
1..;
the saua re i
conve rts
to the
the
FU NCT I O N
"
applied
to
"
input. The
co nve rte r
non l i nea r c haract e r i s tics of
a
tria ng l e
i n to
sinusoida l
TION
switc h .
T h e
sel ected function
h
i nverted
e
e it is
w
r
a n d
put
to
the
g oe s
AMPLITU D E
control
voltage from the DC O F FS ET
and offset a re
inve rted
h
ch can dri
s i g n a l w
i
HI
sou rce i mpedance .
500 OUT
con nector
the 500 O UT LO output.
i n g
Noncon t inuous modes of operation
i n
resu l t f rom a l l ow
g or preventing
from charging the
sou rce
flip-flop
conduct
the trigger
output is low,
ge r diodes
VCG
base l i n e compe nsation c i rc u i t .
re
I from the
n
t
basel i ne at the trian g l e amplifier
SECll0N
·
4
the f requency
selected by
of
the
from it. Since
the cu r
removed
of the
a l
the sum
oporti
on
to
frequency.
capability
(effectively
the
c i rc u i t
mu l tiplyi ng
3
l owe r
m u l t i plie r
the comparator
buffe red and
i s
and to a
f l i p-flop
leve l sh ifte r to
for the
diode
The .square shaper
c i rc u i ts.
t
signal and
o a c u rrent
appl ies
n
The
switc h ,
buffe red triangle is
F U NCTION switc h and
the
to
using the
si ne
conve rter,
its
rv
d iodes,
conve rts
cu rrent
for the
t t o the prea mplifier,
i s
se
n
buffe red. The
p r eampl ifier out
output
through
mpl i
i
a
f
e
r
whe re
is summed with offset
it
con t rol. H e re
,
waveform
to
1 0V
a ±
and ampl ified
e
50n terminati on from a 500
v
a
The output
a m p l i fier
d r ives
re s i s t o r divider
a
and
produc
and
(t rigger
the VCG
c u rrent
Whe
t i m ing capaCitor.
each
of the two
a
I,
21
cu r rent
sou rcing
This
the
removes
cu rrent sou rce and forces
i nput.
cu r
VCG
of the
divides
t i m i ng
gate
it
sine
the
F U NC
the
peak
the
gate)
n-ever
trig
to the
cur
OV
a
4-'
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