Philips CDF 100 Service Manual page 15

PINNING OUTLINE
INPUT INTERFACE;
: (Input). Word Select from EFM 02 WSIN
decoder.
04 DAIN : (Input). Data Input from EFM
decoder.
03 CLIN : (Input). Data Clock from EFM
decoder.
05 EFIN : (Input). Error Flag from EFM
decoder.
23 $1 : (Input). Input format selection.
24 so : (Input). Input format selection.
OUTPUT INTERFACE;
22 DEC : (Input). Output format
selection.(DEC=serial)
40 NIRQ : (Active low output). Indicating new
sector
18 NREQ : (Active low output). Request to
butfermanager
19 NACK : (Active low input). Acknowledge
from request.
20 XFER : (Output). Indicating actual data
transferring.
7..14 0DO..D07 : (Eight bit output). Data bus
(processed data)
16 DDE : (Ninth bit output). Error flag Active
High
17 NOE : (Active low input), Enable output
bus.
uc INTERFACE;
28 NWR : (Input). When low write, when high
read.
31..38 MCO..MC7 : (Eight bit bidirectional bus). For C.
26..25 A0..A1 : (Input). Address lines for
(sub)header status and command
register.
29 NCS : (Active low input). Chip Select.
MISCELLANEOUS;
27 CLK : (Input). System clock.
6,21,39 VDD : (Power supply input). Three times
+5V 10%.
1,15,30 GND : (Power ground input). Three times.
** Scan path enabled if SO = St = "1"
5.1.7 Eve video controller
The EVC takes care of a number of functions and
features in consumer PHOTO CD players. It accepts data
in the PHOTO CD format, stores it into a 256Kx16 DRAM
using 1 of 7 selectable modes. !t supports both M-NTSC
and B-PAL video timings when reading out the DRAM for
a soft display . The display resolution is 512 x 732 fora
PAL system and 431 x 485 for an NTSC system. An
interface is included for receive control and pass status
information to an 8 bit microcontroller. The EVC-1
supports following functions and features :
~ rotating a picture in 90 degrees increments.
— displaying a picture in normal mode
- displaying a part of a picture in 2 x tele mode
- displaying a picture in underscan mode
PCS 66 395
~ anti interlace flicker filtering (with selectable coefficients)
- displaying a recticle (256x256 size)
— panning the recticle on the screen
— panning a picture on the screen
— color and monochrome output
— Y, U and V parallel digital output
— automatic screen and DRAM clearing at power-up
— direct interface to DAC and DRAM
— build-in DRAM refresh
~ build-in crystal oscillators for PAL and NTSC main and
subcarrier clock
— subcarrier lock possibility for NTSC systems
— genlock possibility
— microcontroller interface
- sampie rate convertor build-in to enable smalier DRAM
size combined with full high quality images and to have
a good screen area filling for portrait pictures
The EVC has 4 crystal oscillator invertor cells built-in.
They are used for generating the PAL system clock, the
NTSC system clock, the double PAL subcarrier clock and
the double NTSC subcarrier clock. In PAL mode, only the
PAL system clock and subcarrier oscillator are enabled.
In NTSC mode, only the NTSC system clock an
subcarrier oscillator are enabled.
40 PINS DIL PACKAGE;
PINNING
pin
7
76
60
61
62
41
B| 2 |seucenevessares
|B 1S
92
91
89
name
NREQ
NACK
IDO
(D1
(D2
1D3
1D4
1DS
D6
1D7
RAO
RAI
RA2
RA3
RA4
RAS
RAG
RA7
RA8&
RDO
RD1
RD2
RD3
RD4
RDS
RD6
RD7
RD8
RD9
RD10
RD11
RD12
RD13
RD14
RD15
NCASL
NCASH
NWEL
NWEH
C/NW
| ee | REGSTR INPUT
7 XFER INPUT
INPUT
OUTPUT
INPUT
OUTPUT
vO
NRAS * OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
transfer tine, high during read in of a biock of data
acknowledge, handshake line to the NREQ, active iow when receiver, else
tri-state
input data; bit 0
bit 1
bit 2
bit 3
bit 4
bit 5.
bit 6
bit 7
ee ee ee ee ?
DRAM address; multiplexed; AO . ,
1
> > B
DRAM data ; DQO
DQ10
pai
DQ12
DQ13
snare ae eee at as
i=]
9D @
DQ14
DQ15
RAS signal for the DRAM, act. low
CAS signal for selecting the lower byte of the DRAM ( U&V data ) active
low
CAS signal for selecting the higher byte of the DRAM ( Y data ) active low
WE signal for writing to the lower byte of the DRAM ( U&V data ) active low |
WE signal for writing to the higher byte of the DRAM ( Y data) active low |
selects between 2 CAS and 1 WE signals or 2 WE and 1 CAS signals
(internal pull-up ), if this pin is low WEL and WEH are selected
microcontroller address ; bit 0
. bit 1
" bit 2
* bit 3
microcontroller register strobe ( internal pull-up)
PCS 66 396