Pioneer XR-P460 Service Manual page 71

XR-P360, XR-P360G |
m LC7872E (IC8601 : AF ASSY)
e CD Graphics Signal Processor
Description
@ Pin Assignment (Top view) 15 OS DRAM control
. . q F 16| AO | O | DRAM address
s $53 Fe
= ied E 5 17) Al © | DRAM address
5 'TSiNC 18 AQ O | DRAM address
§ 1S
sia
TESTI
19
AS
O | DRAM address
sisr EI ¥StHC
nel icin 20 A4 O | DRAM address
a 21| a5 | O | DRAM address
VIDEO 22 AG O | DRAM address
BIAS
Yopt 23 AT O | DRAM address
Yssz
Teas 24 DBO |I/O| DRAM data
TSC 195} CAS | O | DRAM control
TEARS:
eo 26 DB1 V/O | DRAM data
TRANS!
27 OE O | DRAM control
& 28| DB2 |V/O| DRAMdata
29 DB3_ | 1/0 | DRAM data
30 cB I | L: Normal mode, H: Colorbar output.
DSP for CD (built-in pull-down resistor)
DSP selection Lovsemnie7| | 81) CDGM | 0 | H: CDG dise
terminal an for CD Lo7aeoKies | | 32|TRANSO| O | Transparency digital output
1 | 1 |versweoiea 33 | TRANS 1| O | Transparency digital output
3 Subcode R to W readout clock 34 | TRANS 2} O | Transparency digital output
4] sPFsy | 1 | Subcode frame sync signal 35 | TRANS 3 | 0 | Transparency digital output
5 Pw 1 | Subcode R to W data 36 | TRANS 4/ O | Transparency digital output
6 | spsy | 1 | subcode block syne signal 37 | TRANS 5| O | Transparency digital output
1 VDD1 — | Digital power supply 38] VSS2 —- | GND for composit video DAC
8 CE I | Serial input or serial output 39 | VDD2 — | Power supply for composit video DAC
control
40 BIAS Ripple rejection capacitor connection
9 DO O | Serial data output
41 | VIDEO Composit video output
10 DI I | Serial data input ( 8bits DAC output )
11 CL I | Clock for serial data 42| TEST I | Test pin Normally "L*
( built-in pull-down resistor )
12 | MUTE I | Control signal for making the subcode
data ineffective 43) LINE I | NP2 terminal H: (H: 263H, L: 262H)
NP2 terminal L; 12H, 14H)
13 vss1 — | Digital GND
FSCIN Sub carrier clock input
DRAM control
(built-in feedback resistor)
66