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UD-300
Converter with Digital Filter : TC9237N
(IC7)
Terminal connection diagram
M/L
MUTE
TEST1
VDA
RO
RO
GNDA
GNDA
to
LO
VDA
TEST2
TEST3
GNDD
Explanation of terminals
Pin No.
1
2
3
4
5
6
7
8
9
Pin name
GNDA
0
Ground for analog circuit {L-ch).
CIRCUIT DESCRIPTION
Block diagram
VDD
LRCK
BCK
DATA
HS
es
eee
EMP
:
R/L
EM2
EM1
MCK
VDX
XO
x!
GNDX
VDA
(8)
<
a
z
oO
M/L
MUTE
TESTI
TSET3
Function
Ground for analog circuit (R-ch).
9
LO
O
Inverted L-ch data output.
ml
10
LO
0
L-ch data output.
11
VDA
-
Power supply for analog circuit (L-ch).
|
ie
12
TEST2
ht
Test terminal (connect to L level).
13
TEST3
|
Test terminal (connect to H Jevel or open circuit).
[
14
GND
|
- |
Ground for logic.
15
GNDX
-
Ground for oscillation.
z
16
Xl
I
Generation of clock freq (384fs).
17
xO
O
Generation of clock freq (384fs).
Z
18
VDX
-
[Power supply for oscillation.
C
19
MCK
oO
Clock output of system (384fs).
20, 21
Ty EM1, 2
|
De-emphasis filter selector.
L
Mode
22. | RIL
R/ L-ch data selector.
R/L
HIGH
| Low | Rech data
L-chiata.
_|
HIGH | _L-ch data
R-chdata.
|
23
EMP
|
De-emphasis filter ON / OFF selector (H = ON, L = OFF).
L
24
HS
|
otal or Double speed selector (H = Normal, L = Double).
|
25
DATA
|
Data input.
26
BCK
|
Bit clock input.
27
LRCK
|
LR clock input.
28
Vop
-
Power supply for logic.
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