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UD-300
CIRCUIT DESCRIPTION
Digital Signal Processor : CXD2500AQ (IC6)
Outline
The CXD2500AQ
is a digital signal processing LSI for a
compact
disc player, which
has the following func-
tions.
e A wide frame jitter margin realized by 32-KRAM (£28
frames)
*
Bit clocks for strobing EFM signal are generated by
the digital PLL, and the capture range is +150kHz
minumum
*
Demodulation
of EFM data
e Protection and reinforcement of EFM frame sync
signal
®
Strong error correction
by refined super strategy.
C1 : Double correction, C2 : Quadruple correction
Double-speed
replay and variable pitch replay
Reduction
of noise generation at track jumps
Auto zero cross muting
Demodulation of sub-code and detection of errors in
sub-code
Q data
Block diagram
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CX)—S)
ee
Olgttat
PLL
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verlce itch
demodulator
double
speed
i
O/A
date processor
aera
Subcode
fe]
generetor!
P~w
processor
18-times
oversampling
titter
Digital spindle servo (Having over-sampling filter)
16-bit traverse counter
CPU interface by serial bus
A built-in servo auto sequencer
Output for digital audio interface
Built-in digital level meter and peak meter
Applicable to bilingual system
Features
e One chip of this LS! can process all the digital sig-
nals used for replay
e
Integration level can be heightened because of the
built-in RAM
:
Structure
Silicon gate CMOS
Serlol/paratlet
Processor
41
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