Tektronix 7L18 Instruction Manual page 19

Circuit Description-7L18 Service
The compensation amplifier and search oscillator form a conditionally stable amplifier that requires
the phase lock loop to have acquired, to become stable. When the loop is not locked, the compensation
amplifier oscillates at about a 3 Hz rate. As the amplifier oscillates, the YIG oscillator searches an amount
somewhat greater than 2.4 MHz.
The search voltage moves the oscillator more than the distance between strobe lines to ensure that
neither temperature effects nor dc balance errors from the phase gate will change the lock-in range. As
we discussed earlier, the lock-in range when the YIG oscillator is at 2 GHz must be greater than 1 MHz, the
spacing between crystals, and less than 1.2 MHz, the maximum recenter range of the offset oscillator. At
4 GHz these numbers are 2 MHz and 2.4 MHz respectively.
The output voltage of the search oscillator is monitored, and when this voltage exceeds an absolute
value determined by the tune voltage, a Lock Inhibit command is given. In this manner, the allowable
lock-in range is varied a factor of two as the oscillator is moved from 2 to 4 GHz.
If the allowable lock-in range is exceeded, the oscillator was not able to acquire lock with the crystal
in use, and anew crystal is selected. The inner loop has time to settle before the search oscillator comes
back into lock-in range and the new crystal is tried.
Eventually the YIG oscillator locks to the strobe reference and the search oscillator stops
oscillating. After a fixed period of time has elapsed to ensure that the lock is real, lock is sensed, and the
crystals are no longer allowed to change.
Next, the YIG oscillator is recentered so that an on-screen signal will be in the same place it was
before lock was initiated. This is done by applying a correction voltage to the offset oscillator from an 8-
bit digital-to-analog converter, until the error voltage from the phase gate is zero. This converter is very
stable to ensure low drift of the offset oscillator. If, for some reason, the converter doesn't have enough
range to recenter the oscillator, the lock sequence is started again, with provisions to ensure that the next
crystal in the sequence is tried first.
After the YIG oscillator is locked to the strobe reference and returned to the frequency it was before
lock was initiated, the sweep voltage is connected to the offset oscillator to sweep the reference. The
bandwidth of the outer loop must be wide enough, about 10 kHz, to ensure that the loop remains locked
during sweep and retrace. The hold-in range of the loop is about 4 MHz to allow for the sweep, fine tune
range, and drift of the oscillator.
DISPLAY MODE AND DEGAUSS SWITCHES
The display mode switches (10 dB/DIV, 2dB/DIV, LIN) control the decoding of the display mode for
the crt readout, and send a display mode control signal to the log amplifier and vertical board. The
10dB/DIV switch also indicates to the microcomputer when this mode is selected. (The microcomputer
uses this information to limit the maximum if gain allowed in the 10dB/DIV position.).
The DEGAUSS switch shorts the main oscillator and preselector coils when pushed. This sets the
current in the coils to zero and establishes a known magnetic history in the cores.
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