HP 7925D Service Manual page 191

MNEMONIC SIGNAL
SCTRG Sector Register
SERSW Service Switch
SRO Service Request
STAT 2 Status Two
STINP Self-Test Input
- - -
STFAIL Self-Test Fail
STOUT
Self-Test Out
SYNC
1
Sync One
TBIT T-Bit
TGBUS Tag Bus
TNSW 0-3 Test Number switches
VRFLG Verify Flag
WC Write Clock
7925
WD
WORD 8
ZERO
Write Data
Eighth Word
Zero Flag
Appendix A
Table A-l. Controller Mnemonics (Continued)
FUNCTION
Enables target sector address to be transferred from ALU to
Target Sector register.
Flag representing state of OP/SERVICE switch on self-test
panel.
Bibirectional HP-IB control line.
Enables transfer of contents of Status register to ALU.
Enables transfer of state of self-test TEST NUMBER switches
to ALU.
Line from Self-Test output register which activates S.T.
FAILED LED on self-test panel and SELF TEST FAILED
indicator on disc drive control panel.
Enables transfer of data from ALU to Self-Test output
register.
Flag indicating that sync word has been detected by data
separator during a read or verify operation.
Line from control bus, Upper Byte register which clears disc
drive Function register and Self-Test output register.
Enables transfer of data to disc drive Function register.
Four lines connecting self-test TEST NUMBER switches to
Self-Test input register.
Flag from PHI Control Word register which disables PHI chip
from transferring data out during a verify operation.
A 7.5-MHz clock from formatter during a write operation
which advances word counter and clocks data from FIFO to
formatter.
Serial data from data path multiplexer to formatter during write.
Flag for microprocessor indicating eighth word in read, write,
or verify data transfer.
A flag indicating presence of all zeros in ALU output.
The components comprising the three modules of the con-
troller are described in the following paragraphs.
A-9.
MICROPROCESSOR MODULE. The mi-
croprocessor module consists of the following components.
A-ll. Read-Only Memory (ROM), The controller
utilizes a 24-bit wide microcode format and 3072 words of
control store made up of three 2k x 8 and three lk x 8
ROM integrated circuits with 80 nanosecond access time.
A-l2. Operation Control Registers. The operation
control registers form the interface between the micro-
processor and the disc drive electronics. The functions of
the registers are as follows:
A-lO. Eight-Bit Microprocessor. The micro-
processor is composed of two four-bit slice bipolar micro-
processor integrated circuits. It executes all of the arith-
metic, logical, and I/O operations within the instruction
cycle time of 267 nanoseconds. The microprocessor handles
all the communications and command interpretations for
the controller, and in turn generates most of the timing
and all of the control signals needed by the controller and
the disc drive. (The'DMA hardware generates its own
timing signals once it has been enabled by the micro-
processor.) The microprocessor also executes the self-test
algorithms for self-test diagnostics of the disc drive.
Output Register
Function
Control Bus
Upper and
Control Bus
Lower
Contents/Functions
Drive command (one bit per drive
function)
Cylinder and offset address, front
panel LED, self-test bit
A-9