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Theory of Operation
with the high Cylinder Match turns on the forward gate,
while a high Carry and high Cylinder Match turns on the
reverse gate. During a forward seek operation, the forward
gate is enabled and connects a high Velocity Command
signal through a forward-velocity inverter to the current
command circuit to assembly A4. A reverse seek operation
finds the reverse gate enabled, and the high Velocity Com-
mand signal is connected directly to the current command
circuit.
4-35.
The Velocity Command input to assembly A9 is
an analog signal supplied by a velocity curve generator in
assembly All. The difference value between the destina-
tion address register and current address register in as-
sembly All is applied in binary form to the velocity
decode and velocity curve generator circuits by the address
difference adder circuit. A large difference between the two
addresses provides a high-value Velocity Command signal.
During a seek operation, the Forward Count signal or
Reverse Count signal received from assembly A9 is used to
update the current address register in assembly All as the
carriage moves. As the difference between the current ad-
dress and destination address becomes smaller, the Velocity
Command signal to assembly A9 is reduced proportionally.
4-36.
In assembly A9, the Velocity Command signal is
passed through a gating circuit to the current command
circuit between assembly A9 and servo amplifier/regulator
assembly A4. A Current Command signal in assembly A4 is
processed and fed to one of two drive amplifier circuits.
One drive amplifier and an associated power amplifier are
used to handle each Current-Command signal polarity. The
enabled power amplifier applies current to the linear motor
through a relay that is energized by the low Energize Servo
Relay signal from assembly AlO. As the linear motor moves
the carriage in the direction dictated by the Current-
Command signal polarity, a velocity transducer supplies a
Tach-In voltage back to assembly A9. This voltage is pro-
portional to carriage speed and direction, and provides
damping characteristics to the Current Command output
from assembly A9.
4-37.
As
the carriage moves in response to a Current
Command signal, an optical encoder provides carriage posi-
tion information. Three channels of position information,
which are defined as the A, Band C channels, are sent to
encoder assembly A9. The C-channel information is used to
position the carriage in the home position as discussed in
paragraph 4-26. The A and B channels, which are phase-
separated by 90 degrees, are used to position heads over an
addressed cylinder. The controlling conditions during
original carriage movement are the high Cylinder Match, the
condition of the Carry input from assembly All, and the
output of the B-channel shapero When the heads reach the
destination cylinder boundary, Cylinder Match becomes
low and carriage positioning becomes the function of the
A-channel shaper through the fine position gate. Positioning
the heads at the zero point in a cylinder (physical center) is
achieved by servo action between the A-channel output
from the head position encoder and the linear motor. When
the zero position in a cylinder is reached, a track center
detector in the A-channel circuit provides a low Position
4-6
790lA
Match output from assembly A9 to assembly AlO. Receipt
of the signal in assembly AlO develops the high Access
Ready and Attention outputs which are applied to as-
sembly Al2 (refer to paragraphs 4-28 and 4-29).
4-38.
Carriage movement toward a cylinder also provides
an A-channel output that is applied to two differentiator
circuits in assembly A9. One differentiator develops pulses
when carriage movement is forward, and the other when
the carriage is moving in a reverse direction. Each alternate
zero-crossing of the A-channel input indicates the center of
a cylinder, and a forward or reverse pulse is developed
accordingly. These pulses are fed to assembly All via the
forward count or reverse count lines, as applicable, to
update the current address register. When the output of the
destination address register and current address register are
equal, outputs from the velocity decode circuit energize a
gate to provide the low Cylinder Match output to assembly
A9 with the results described in paragraph 4-37.
4-39.
HEAD AND SECTOR CONTROL.
4-40.
There are two heads per disc drive, one for each
surface of the disc. The disc contains 203 cylinders; 203
tracks per surface, with 24 sectors per track. Carriage posi-
tioning places both heads over a selec.ted cylinder. Head
and sector select input signals then define the portion of the
disc to be used in a read or write operation.
4-41.
A head-and-sector select operation is initiated by
the controller pulsing the Set Head and Sector control line
into I/O multiplex assembly Al2 and placing the head-
and-sector address on the Control Outbus 0 through 7 lines.
In assembly Al2, the control signal is passed through an
enabled select gate and is passed to sector cylinder assembly
All as a low Drive Set Head and Sector signal. In assembly
All, the output is passed through the illegal sector decode
circuit, and is used to strobe the sector address into the
sector address register. The signal also is used to enable the
Head Select flip-flop and a flip-flop in the sector compare
circuit.
4-42.
Head-and-sector address data from assembly Al2
to assembly All is carried on the Drive Outbus 0 through 7
lines. In assembly All, the data is passed through an illegal
address decode circuit, with the decoded output passed to
the illegal sector decode circuit. An illegal address or an
illegal sector select produces a low Illegal Address output
from assembly All thatis described later in this discussion.
The Drive Outbus 0 line into assembly All during a head-
and-sector select operation provides an illegal head address
check in the illegal sector decode circuit. The Drive Outbus
1 line carries the head address, the Drive Outbus 2 line is
not used, and the Drive Outbus 3 through 7 lines carry the
sector address.
4-43.
A high Drive Outbus lline and low Drive Set Head
and Sector signal in assembly All set the Head Address
flip-flop, which provides a high Head
1
output. This signal
is passed from assembly All to read/write control assembly
A 7. During normal operation in assembly A 7 the head
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