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To
understand
this,
imagine
first
a preemphasis
cascaded
with
a 12dB/octave
lowpass
filter.
As
frequency
is
increased,
the
response
will
first
rise
at
6dB/octave,
following the preemphasis. However, when the cutoff frequency
of
the
lowpass
filter
is
encountered,
the
response
will
reverse
itself
and
fall
at
6dB/octave indefinitely.
This
is
similar
to
the
response
of
a peaking
equalizer.
However,
when
the
response
of
the
peaking
equalizer
falls,
it
does
not
fall
indefinitely,
but
only
until it reaches unity gain again. Nevertheless, we can choose a peaking equalizer
whose rising side matches the rising side of our original preemphasis-plus-lowpass-
filter to very close tolerances.
The
falling side, after
deemphasis, represents the stopband of the filter. Thus,
when considered as a totality, the response of the entire fourth- order filter will,
instead of falling indefinitely at 24dB/octave, fall for approximately 20dB after
cutoff at 24dB/octave, and at 12dB/octave thereafter.
4.a)
Differential
Preemphasis
and
High
Frequency
Limiter:
( on
Card # 6)
The
advantage
of
transforming
the lowpass
filter
as
described
in
the
previous
section is that it permits us to create the preemphasis differentially, by summing
the output
of
bandpass filter IC602B,
R614,
R615,
R617, C607, C608 with the
filter's input. The summation occurs in IC605A. The output of IC602B is passed
through
a variable- gain
stage,
realized
with
FET
IC603A,
and
low- noise
non-
inverting amplifier IC604. By varying the gain with which the output
of IC602B
is summed with its input, a high- frequency limiter is realized.
Ordinarily,
IC603A
is
pinched
off,
thus
producing
maximum
gain
and
full
preemphasis. However, as the gate voltage on IC603A is reduced toward ground,
the
resistance of IC603A decreases, thus decreasing the gain of voltage divider
R619, R620, IC603A and reducing the preemphasis.
The
polarity
reversal
in IC602B
requires
that
a compensating
polarity
reversal
occur
in
the
summing
process.
IC605A
is
thus
non- inverting
for
the
bandpass
signal, and inverting for
the
main signal. In addition, R616 feeds some of
the
output
of
IC602B
around
the
variable- gain
stage
out- of- phase.
This
permits
complete
cancellation
of
the
preemphasis
despite
the
inability
of
the
FET
variable- gain stage to achieve total cutoff.
4.b) High Frequency Limiter Control Circuitry: ( on Card # 6)
The
high
frequency limiter control
circuitry is
very similar to the compressor
control circuitry described in 2.d above. The output of the bandpass filter only is
applied to the rectifier- with- threshold, which is identical to the ones used in the
compressor control circuitry. Similarly, the output of the rectifier is connected to
a proprietary release- time
module, and the threshold- of- limiting adjustment
and
PROOF
mode G/R defeat
are also substantially identical to previously described
circuits.
The output of the module, unlike the outputs of the release time modules in the
compressor control circuitry, is high impedance. It drives the high impedance gate
of FET IC603A through R625.
Gain
reduction
is
indicated
by
a simple
ON/OFF
LED
indicator,
driven
by
IC606A.
FET
SIAS
adjustment
R626
determines
the
quiescent
gate
voltage
of
IC603A, assuring pinchoff under conditions of no limiting. This voltage is applied
through release time resistor R627 to the "-" input of IC606A. This input will be
pulled in the negative direction when gain reduction occurs.
B-7
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