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Operation
and Programming
POWERING
DOWN AND
UP
WITH
DATA RETENTION
Normal Power
Cycling
Figure 3-2 gives flowcharts
for
turning
power
off
and
on,
and
(or
removing and
inserting
the
7706
with data
retention.
The
flowcharts involve
some
software
and
some manual
operations.
The
flowcharts
incorporate
the following three
guidelines,
which must be
followed
when
power
cycling
with data
retention:
(POWER
\
DOWN
J
(power:
\
HALT
CPU
POWER
DOWN
POWER
UP
I
DELAY
IF
NEEDED
(
END
)
RUN
PROGRAM
(
E
ND
)
Figure 3-2A.
Power
Cycling Procedures
•
Prevent
the
processor
from
writing
to
the
7706.
Any
data
being
written
to
the
processor
at
the
time
it
write-
protects
itself
may
not get written
correctly.
If
in
your
appli-
cation
you
need
to
avoid
this
possibility,
the
processor
should
be
halted. This
can be
done by
a
HALT
instruction
or
by
inhibiting the
processor through hardware, as
by
activating
the
WAITRQ"
line.
Also,
you
should
not
attempt
to
write
to
the
7706
immedi-
ately
after
powor-up.
The
7706
write protects
itself
whenever
power
is
below
normal.
It
is
possible
lor
the
processor
lo
be
active
before the
7706
is
ready
to
accepl da
la.
If
this
is
a
possibility
in
your prog
ram,
Ihe
problem can be
avoided
by
putting a short
delay
at
the
beginning
of
your program.
The
required lenglh
of
the
delay
is
dependent on
the
rise
time
of
your
power
supply.
•
Use
the Write
Inhibit
switches
when
removing
the card.
When
removing
or inserting the card,
put
the
Write
Inhibit
switches
in
the
"OFF"
or
"OPEN"
position.
• Never
insert the
card with
power
on.
When
insert
ing
or
removing
the 7706, or
any
card,
be
sure the
power
is
off.
/PWR
DOWN
V
REMOVE
J
HALT CPU
POWER
DOWN
ENGAGE
WRITE
INHIBIT
SWITCHES
DISENGAGE
WRITE
INHIBIT
SWITCHES
AS
NEEDED
REMOVE
CARD
TL
(
END
)
POWER
UP
DELAY
IF
NEEDED
RUN
PROGRAM
(
EN
°
)
Figure 3-2B.
Power
Cycling Procedures
Data Retention During
Power
Failures
Figure 3-3
shows
Ihe
procedure
for
retaining
data
during
a
power'
failure.
The procedure
will
also retain
the
address
that
is
in
the
program
counter
when
power
goes down.
It
assumes
that
there
is
power
failure
detection
circuitry
in
the
system
(see
Fig.
3
A).
While
the detection
circuitry
is
not
essential,
since the
7706
will
retain
data
through
a
power
failure,
it
does have
three
advantages:
First,
the
processor
will
know
in
advance
that
power
is
going
down.
This
gives
it
a
chance
to
move
essential
data
and
the
subroutine
stack
onto the
7706.
Even
if
these are
normally kept
on
the
7706,
you
may
also
need
to
store
the
contents
of
Ihe
registers.
3-2
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