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Bit 3
When set to 1, this bit enables the square-wave frequency
as set by the rate-selection bits in Status Register A. The
system initializes this bit to O.
Bit 2
This bit indicates if the time-and-date calendar updates
use binary or binary-coded-decimal (BCD) formats. When
set to 1, this bit indicates a binary format. The system
initializes this bit to O.
Bit 1
This bit establishes if the hours byte is in the 24-hour or
12-hour mode. When set to 1, this bit indicates the 24-hour
mode. The system initializes this bit to 1.
Bit 0
When set to 1, this bit enables the daylight savings time
mode. When set to 0, it disables the mode, and the clock
reverts to standard time. The system initializes this bit to
O.
Status Register C (Hex OOC)
Bit
Function
7
Interrupt Request Flag
6
Periodic Interrupt Flag
5
Alarm Interrupt Flag
4
Update-Ended Interrupt Flag
3 - 0
Reserved
Figure
3-12. Status Register C
Note: Interrupts are enabled by bits 6,5, and 4 in Status Register B.
Bit 7
This bit is used in conjunction with bits 6,5, and 4. When
set to 1, this bit indicates that an interrupt has occurred;
bits 6, 5, and 4 indicate the type of interrupt.
Bit 6
When set to 1, this bit indicates that a periodic interrupt
occurred.
Bit 5
When set to 1, this bit indicates that an alarm interrupt
occurred.
Bit 4
When set to 1, this bit indicates that an update-ended
interrupt occurred.
Bits 3 - 0
Reserved.
Model 60 System Board
3·15
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