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Model
5315A/
B
Service
8-8
A constant 2.5
volts
from the reference
regulator
US is input to oneside of
e
rror
amplifier
U3. The
o
utput
of the +5V pass transistor is
d
ivided down through
vohage
dividers R19, R16, and R15and
input to
the e
rro
r
amplifier.
Any
d
ri
ft in
the
S· volt
out is
detecte
d and corrected by
U3
and
Q4.
Q5
provides
cu rrent limit ing
to
=6 amps max
imum
. The
reg
ulate
d
+5
volls
is
output to the
instru·
men
t and in
pu
t
to
U4,
the +3 volt regu lator.
The
outpu
t
of
thi
s
regulator is
set
by
voltage divider
R12,
R1
1, and
feed
back resistor R10.
C2l
filters the +3
before it
is output
to the
MRC.
8·48.
The unregulated
-9V
dc is applied
to
the
-5.2V
regulator
U6.
The output
of U6 is set
by
vollage
divider
R23,
R22,
and
feedb ack
resistor
R2l
. C26
filters
the -5.2
before it is
output to
the
input
amplifier assembly.
8·49.
U3
is used in
conju nct
io
n
with
the Battery·Pack, O ption
002,
to
disable the
main power
supp ly
should the battery
cha
rge level d rop to a
point less
tha
n
20%
of fu
ll
charge.
8-50.
A2 Display Assembly
8·51.
The
display assembly
provides eigh
t
digits of resolu
tion with
seven·segment
LEOs
De
through
07. The displays are controlled by display d river U3. The display driver
contai
ns
complete
decoding,
memory,
and
sca
n
circuitry as well as
power drivers for the LEOs. The
~x~
n
e
n
t
digit
is
decoded
in
U2
and
displayed in 058.
Ul
d rives
an nunciato rs
lights
for
GATE,
-
,
Hz, and
s.
8-52.
Al Input Assembly
8-53. The Input
Assembly
contains the A and B
Channel
signa
l
cond
itioni
ng
switches,
the
Trigge
r L
evel/
Sensi
tivity
controls,
and
Trigger lights.
51 and
510
select
eit her
AC or
DC
coupling.
57 is the
SEP/
COM
A switch
which allows the
Channel
B
amplifier
to
be
driven by eit her the B
Channel
BNC
(2)
in
SEP,
or
the A Channel BNC
(J
l
)
in
COM A.
S3 and 58 select
Xl
o
r
X20
atten uation by
switch
ing in (or out) the
voltage
d
ividers
Rl
,
R3 and
R1
4,
R12. C4,
C5
and
C8, C9
compensate
for
hig
h
freque ncy.
R4, R9,
C7
and
R16,
R17,
Cl
0 fo rm
current
limiting
netwo rks.
CR1
,
CR2 and CR3, CR4 are
voltage
lim ite
rs.
S5
selects
a normal or low pass fi lter
configurat
ion
fo
r Chann
e
l
A.
In
the
low pass mode, C7
is
d
iscon
nected,
and the
Hi
Freq
uency input
o
n
pi
n
13
is
conn
ected to gro und. The
combinatio
n of
R9,
stray
capacitance and
the
input capacita nce of
the
amplifier
o
n
A4
roll
off
freq
ue ncies above 100
kH
z.
8·
54. The
LEVEl/
SENS
contro ls R2 and R15 provide adjustab le dc
levels.
from +5V to -5.2V fo
r
use
with e ither the
LEVEL
or SENS
ITI
VITY outputs.
With
54 or S6
in
the
SENSITIVITY
position, the
voltage swi
ng
is
applied
to the
divider
networks
R6, R5,
R7 and
R10, R11, R13.
provid
ing a voltage
swing
of =+40 to
-
70 millivolts to the
Sensitivity
node
of the
A4
comparators.
The
LEVEl outpu
ts
default to effectively zero.
With
the
switches set to
TRIGGE
R
lEVEl,
the
SENSITIVITY outputs are
tied
(high)
to
+5V
and the voltage swing is divided
in half
via
resistor networks
within
R8.
A
voltage
swing of
=-±l.5
vo lts
is output
to the
Trigger
Level
inp uts of A4
comparators.
8·55.
OSl
and
OS2 are the Chan ne
l
A and
Cha nne
l B
Tr
igger
lig
hts.
S2 and
S9
are the slo pe
se
lect io
n
switches which
pull
to g
round, or
allow to float hig h, the
Slope A
and
Slope
B
lines.
Th
ese lines are routed
throug
h
A4 to the
microcomputer
on A 1.
8-56. A4 Amplifier Assembly
8·57.
The
Amplifier
Assembly
contains two essentially ide ntical
amplifier
channels. The only
differences are;
(1)
the low
freque
ncy
and high
freq uency
ampl
ifiers
have
separate
in puts fo
r
Chan ne
l
A and are conneded together for Channel B.
(2)
Cha nnel B has one additiona
l
output
stage
which
d
rives
the EXT ARM line. For
simpli
ficat ion, o nly Cha
nnel
A
wi
ll
be described
.
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