Hisense 55U8GQ Service Manual page 74

Table of Contents

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5
BA2,CSB1,CSB2 need GND shielding
AVDD_DRAM
N1A
R438
1%
1k
B-RSTZ
J29
A-RST
D
C139
100n/16V
B-CKE
K28
A-CKE
R439
10k
AVDD_DRAM
R440 1k
DRAM_VREF
J30
DRAM_VREF
1%
C140
C141
R441
1%
100n/16V
1n/50V
1k
R442 240R
ZQ
H29
ZQ
1%
C
R443 240R
ZQ1
J28
ZQ1
1%
TP6
MCP_TEST
1
V24
IO_TEST
MSD6886NQH
B
+1.5V_DDR
AVDD_DDR_2_S
C142
10u/6.3VV
0603
X5R
A
5
4
D_DDR3_WEZ
B11
WEZ
D_DDR3_A15
C11
A15
D_DDR3_A0
B10
A0
D_DDR3_RASZ
D10
D_DDR3_CASZ
RASZ
C12
CAS
D_DDR3_A8
E12
A8
D_DDR3_A9
B9
A9
D_DDR3_A4
A14
A4
D_DDR3_A13
A9
A13
D_DDR3_A11
E11
A11
D_DDR3_A1
C13
A1
D_DDR3_A2
A10
A2
D_DDR3_A5
E9
A5
D_DDR3_A6
C14
A6
D_DDR3_BA0
C7
BA0
D_DDR3_BA2
D7
BA2
D_DDR3_ODT
E6
ODT
D_DDR3_A14
B13
A14
D_DDR3_RESET
B8
RST
D_DDR3_BA1
C15
BA1
D_DDR3_A10
B15
A10
D_DDR3_A7
C8
D_DDR3_CKE
A7
E7
CKE
D_DDR3_CSB1
C6
CSB0
D_DDR3_CSB2
A6
CSB1
D_DDR3_A3
E8
D_DDR3_A12
A3
D12
A12
D_DDR3_DM0
B18
DQM[0]
D_DDR3_DQ13
E19
DQ[13]
D_DDR3_DM2
B25
D_DDR3_DQ29
DQM[2]
E26
DQ[29]
D_DDR3_MCLK
C17
MCLK
D_DDR3_MCLKZ
B16
MCLKZ
D_DDR3_DQ0
C22
DQ[0]
D_DDR3_DQ1
C18
DQ[1]
D_DDR3_DQ2
A22
D_DDR3_DQ5
DQ[2]
B19
DQ[5]
D_DDR3_DQ6
C23
DQ[6]
D_DDR3_DQ3
A17
DQ[3]
D_DDR3_DQ4
B23
DQ[4]
D_DDR3_DQ7
C20
DQ[7]
D_DDR3_DQS0
C21
D_DDR3_DQS0B
DQS[0]
B21
DQSB[0]
D_DDR3_DQ15
E18
DQ[15]
D_DDR3_DQ14
E13
DQ[14]
D_DDR3_DQ9
E17
DQ[9]
D_DDR3_DQ8
D16
D_DDR3_DQ11
DQ[8]
D21
DQ[11]
D_DDR3_DQ10
D14
DQ[10]
D_DDR3_DM1
D18
DQM[1]
D_DDR3_DQ12
E14
DQ[12]
D_DDR3_DQS1
E16
DQS[1]
D_DDR3_DQS1B
E15
DQSB[1]
D_DDR3_DQ16
C28
DQ[16]
D_DDR3_DQ17
C25
DQ[17]
D_DDR3_DQ18
C27
DQ[18]
D_DDR3_DQ21
B26
DQ[21]
D_DDR3_DQ22
D27
DQ[22]
D_DDR3_DQ19
B24
DQ[19]
D_DDR3_DQ20
E28
AVDD_DDR_2_S
DQ[20]
D_DDR3_DQ23
A27
DQ[23]
D_DDR3_DQS2
R450
B27
DQS[2]
D_DDR3_DQS2B
B28
DQSB[2]
D_DDR3_DQ31
D26
DQ[31]
D_DDR3_DQ30
E21
D_DDR3_DQ25
DQ[30]
D25
DQ[25]
D_DDR3_DQ24
D22
DQ[24]
D_DDR3_DQ27
E27
DQ[27]
D_DDR3_DQ26
E20
DQ[26]
D_DDR3_DM3
E25
DQM[3]
D_DDR3_DQ28
D23
D_DDR3_DQS3
DQ[28]
E24
DQS[3]
D_DDR3_DQS3B
E23
DQSB[3]
AVDD_DDR_2_S
C340
C341
C342
C343
C344
C345
C346
C347
C348
C349
0603
10u/6.3VV
10u/6.3VV
10u/6.3VV
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
X5R
AVDD_DDR_2_S
C350
C351
C352
C353
C354
C355
C356
C357
C358
C359
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
100n/16V
4
3
DDR3 4Gb+4Gb 2133MHz
DDR3#1
N60
D_DDR3_DQ0
D_DDR3_A0
E3
N3
D_DDR3_DQ1
DQ0
A0
D_DDR3_A1
F7
P7
D_DDR3_DQ2
DQ1
A1
D_DDR3_A2
F2
P3
D_DDR3_DQ3
DQ2
A2
D_DDR3_A3
F8
N2
D_DDR3_DQ4
D_DDR3_A4
H3
DQ3
A3
P8
D_DDR3_DQ5
DQ4
A4
D_DDR3_A5
H8
P2
D_DDR3_DQ6
DQ5
A5
D_DDR3_A6
G2
R8
D_DDR3_DQ7
DQ6
A6
D_DDR3_A7
H7
R2
D_DDR3_DQ8
DQ7
A7
D_DDR3_A8
D7
T8
D_DDR3_DQ9
DQ8
A8
D_DDR3_A9
C3
R3
D_DDR3_DQ10
DQ9
A9
D_DDR3_A10
C8
L7
D_DDR3_DQ11
DQ10
A10_AP_63
D_DDR3_A11
C2
R7
D_DDR3_DQ12
DQ11
A11
D_DDR3_A12
A7
N7
D_DDR3_DQ13
DQ12
A12_BC#_79
A2
D_DDR3_DQ14
DQ13
B8
J1
D_DDR3_DQ15
DQ14
NC_0
A3
J9
DQ15
NC_1
L1
NC_2
L9
D_DDR3_DQS1
D_DDR3_A15
NC_3
C7
M7
D_DDR3_DQS1B
UDQS
NC_4
D_DDR3_A13
B7
T3
D_DDR3_DQS0
UDQS#_4
A13
D_DDR3_A14
F3
T7
D_DDR3_DQS0B
LDQS
A14
G3
D_DDR3_DM1
LDQS#_28
D_DDR3_BA0_L
D3
M2
D_DDR3_DM0
UDM
BA0
D_DDR3_BA1
E7
N8
D_DDR3_BA2_L
LDM
BA1
M3
BA2
D_DDR3_MCLK
J7
CK
D_DDR3_MCLKZ
D-MVREFCA-T1
H1
K7
VREFDQ
CK#_56
D-MVREFCA-T1
M8
L2
D-CSB1
VREFCA
CS#_62
D_DDR3_CASZ
L8
K3
D_DDR3_RESET
ZQ
CAS#_61
D_DDR3_ODT
T2
K1
D_DDR3_RASZ
RESET#_58
ODT
J3
R444
RAS#_55
D_DDR3_WEZ
L3
R445
R446
1%
WE#_54
K9
D-DDR3-CKE-T1
240R
CKE
AVDD_DDR_2_S
22R
22R
A1
B1
A8
VDDQ_0
VSSQ_0
B9
VDDQ_1
VSSQ_1
C1
D1
VDDQ_2
VSSQ_2
C9
D8
VDDQ_3
VSSQ_3
D2
E2
VDDQ_4
VSSQ_4
E9
E8
VDDQ_5
VSSQ_5
F1
F9
VDDQ_6
VSSQ_6
H2
G1
VDDQ_7
VSSQ_7
H9
G9
VDDQ_8
VSSQ_8
B2
A9
VDD_0
VSS_0
D9
B3
VDD_1
VSS_1
G7
E1
VDD_2
VSS_2
K2
G8
VDD_3
VSS_3
K8
J2
VDD_4
VSS_4
N1
J8
VDD_5
VSS_5
N9
M1
VDD_6
VSS_6
R9
M9
VDD_8
VSS_7
R1
P1
VDD_7
VSS_8
P9
VSS_9
T1
VSS_10
T9
VSS_11
K4B4G1646E-BCNB
1k
D-MVREFCA-T1
1%
AVDD_DDR_2_S
AVDD_DDR_2_S
C335
R452
1n/50V
1%
R455
1k
系统无620R 电阻
R454
560R
10k
D_DDR3_RESET
D-CSB1
D-MVREFCA-T1
D-DDR3-CKE-T1
C337
R458
系统无620R 电阻
R460
560R
1n/50V
10k
D-DDR3-CKE-T1
D-CSB1
D_DDR3_A10
D_DDR3_ODT
D_DDR3_A0
D_DDR3_A2
D_DDR3_A13
D_DDR3_A9
D_DDR3_BA1
D_DDR3_A12
D_DDR3_A4
D_DDR3_A6
D_DDR3_A5
D_DDR3_A3
3
2
公版DDR A14、A15均NC,Hisense 只有A15 NC
DDR3#2
N61
D_DDR3_DQ16
E3
D_DDR3_DQ17
DQ0
A0
F7
D_DDR3_DQ18
DQ1
A1
F2
D_DDR3_DQ19
DQ2
A2
F8
D_DDR3_DQ20
H3
DQ3
A3
D_DDR3_DQ21
DQ4
A4
H8
D_DDR3_DQ22
DQ5
A5
G2
D_DDR3_DQ23
DQ6
A6
H7
D_DDR3_DQ24
DQ7
A7
D7
D_DDR3_DQ25
DQ8
A8
C3
D_DDR3_DQ26
DQ9
A9
C8
D_DDR3_DQ27
DQ10
A10_AP_63
C2
D_DDR3_DQ28
DQ11
A11
A7
D_DDR3_DQ29
DQ12
A12_BC#_79
A2
D_DDR3_DQ30
DQ13
B8
D_DDR3_DQ31
DQ14
NC_0
A3
DQ15
NC_1
NC_2
D_DDR3_DQS3
NC_3
C7
D_DDR3_DQS3B
UDQS
NC_4
B7
D_DDR3_DQS2
UDQS#_4
A13
F3
D_DDR3_DQS2B
LDQS
A14
G3
D_DDR3_DM3
LDQS#_28
D3
D_DDR3_DM2
UDM
BA0
E7
LDM
BA1
BA2
CK
D-MVREFDQ-T2
H1
VREFDQ
CK#_56
D-MVREFDQ-T2
M8
VREFCA
CS#_62
L8
D_DDR3_RESET_H
ZQ
CAS#_61
T2
RESET#_58
ODT
R447
RAS#_55
1%
WE#_54
240R
CKE
AVDD_DDR_2_S
A1
A8
VDDQ_0
VSSQ_0
VDDQ_1
VSSQ_1
C1
VDDQ_2
VSSQ_2
C9
VDDQ_3
VSSQ_3
D2
VDDQ_4
VSSQ_4
E9
VDDQ_5
VSSQ_5
F1
VDDQ_6
VSSQ_6
H2
VDDQ_7
VSSQ_7
H9
VDDQ_8
VSSQ_8
B2
VDD_0
VSS_0
D9
VDD_1
VSS_1
G7
VDD_2
VSS_2
K2
VDD_3
VSS_3
K8
VDD_4
VSS_4
N1
VDD_5
VSS_5
N9
VDD_6
VSS_6
R9
VDD_8
VSS_7
R1
VDD_7
VSS_8
VSS_9
VSS_10
VSS_11
K4B4G1646E-BCNB
AVDD_DDR_2_S
R451
1k
1%
AVDD_DDR_2_S
AVDD_DDR_2_S
R457
系统无620R 电阻
R456
560R
10k
D_DDR3_RESET_H
D-CSB2
C336
D-DDR3-CKE-T2
100n/16V
R459
系统无620R 电阻
R461
560R
C338
10k
100n/16V
D_DDR3_CKE
D_DDR3_CKE
D-DDR3-CKE-T2
R462
22R
R463
22R
D_DDR3_CSB1
D_DDR3_CSB2
D-CSB2
R465
22R
R466
22R
D_DDR3_A10_H
D_DDR3_A7
D_DDR3_A7_H
R467
75R
R468
75R
D_DDR3_ODT_H
D_DDR3_BA2_L
D_DDR3_BA2
R469
75R
R470
75R
D_DDR3_BA0_L
D_DDR3_BA0
R471
75R
75R
R472
75R
R473
D_DDR3_A0_H
D_DDR3_A8
D_DDR3_A8_H
8
1
8
1
D_DDR3_A2_H
D_DDR3_A11
D_DDR3_A11_H
7
2
7
2
D_DDR3_A13_H
D_DDR3_A14
D_DDR3_A14_H
6
3
6
3
D_DDR3_A9_H
D_DDR3_A1
D_DDR3_A1_H
5
4
5
4
75R
R474
75R
R475
D_DDR3_BA1_H
D_DDR3_A15
D_DDR3_A15_H
8
1
8
1
D_DDR3_A12_H
D_DDR3_RASZ
D_DDR3_RASZ_H
7
2
7
2
D_DDR3_A4_H
D_DDR3_CASZ
D_DDR3_CASZ_H
6
3
6
3
D_DDR3_A6_H
D_DDR3_WEZ
D_DDR3_WEZ_H
5
4
5
4
75R
R476
75R
R477
8
1
8
1
D_DDR3_A5_H
D_DDR3_BA0
D_DDR3_BA0_H
7
2
7
2
D_DDR3_A3_H
D_DDR3_BA2
D_DDR3_BA2_H
6
3
6
3
5
4
5
4
2
1
D_DDR3_A0_H
N3
D_DDR3_A1_H
P7
D_DDR3_A2_H
P3
D_DDR3_A3_H
N2
D
D_DDR3_A4_H
P8
D_DDR3_A5_H
P2
D_DDR3_A6_H
R8
D_DDR3_A7_H
R2
D_DDR3_A8_H
T8
D_DDR3_A9_H
R3
D_DDR3_A10_H
L7
D_DDR3_A11_H
R7
D_DDR3_A12_H
N7
J1
J9
L1
L9
D_DDR3_A15_H
M7
D_DDR3_A13_H
T3
D_DDR3_A14_H
T7
D_DDR3_BA0_H
M2
D_DDR3_BA1_H
N8
D_DDR3_BA2_H
M3
D_DDR3_MCLK-1
J7
D_DDR3_MCLKZ-1
K7
L2
D-CSB2
D_DDR3_CASZ_H
K3
D_DDR3_ODT_H
K1
D_DDR3_RASZ_H
J3
D_DDR3_WEZ_H
L3
R449
R448
K9
D-DDR3-CKE-T2
56R
56R
B1
B9
D1
D8
E2
C333
E8
100n/16V
F9
G1
G9
A9
B3
E1
C
G8
J2
J8
M1
M9
P1
P9
T1
T9
D-MVREFDQ-T2
R453
C334
1%
1k
1n/50V
D-MVREFDQ-T2
C339
1n/50V
B
D_DDR3_RESET
D_DDR3_RESET_H
R464
75R
A
Title
Title
Title
MSD6886NQH
MSD6886NQH
MSD6886NQH
Size
Size
Size
Docum ent Num ber
Docum ent Num ber
Docum ent Num ber
Rev
Rev
Rev
Cus tom
Cus tom
Cus tom
DRAM
DRAM
DRAM
v1.0
v1.0
v1.0
Date:
Date:
Date:
Thurs day, Novem ber 01, 2018
Thurs day, Novem ber 01, 2018
Thurs day, Novem ber 01, 2018
Sheet
Sheet
Sheet
7
7
7
of
of
of
15
15
15
1

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