Hisense 55U8GQ Service Manual page 56

5
BA2,CSB1,CSB2 need GND shielding
AVDD_DRAM
N1A
R438
1%
1k
J29
B-RSTZ
A-RST
D
C139
100n/16V
K28
B-CKE
A-CKE
R439
10k
AVDD_DRAM
R440 1k
DRAM_VREF J30
DRAM_VREF
1%
C141
C140
R441
1%
100n/16V
1n/50V
1k
R442 240R
ZQ H29
ZQ
1%
R443 240R
C
ZQ1 J28
ZQ1
1%
TP6
1 V24
MCP_TEST
IO_TEST
MSD6886NQH
B
+1.5V_DDR AVDD_DDR_2_S
C142
10u/6.3VV
0603
X5R
A
5
4
B11 D_DDR3_WEZ
WEZ
C11 D_DDR3_A15
A15
B10
D_DDR3_A0
A0
D10 D_DDR3_RASZ
RASZ
C12 D_DDR3_CASZ
CAS
E12 D_DDR3_A8
A8
B9
D_DDR3_A9
A9
A14
D_DDR3_A4
A4
A9 D_DDR3_A13
A13
E11 D_DDR3_A11
A11
C13 D_DDR3_A1
A1
A10
D_DDR3_A2
A2
E9
D_DDR3_A5
A5
C14 D_DDR3_A6
A6
C7 D_DDR3_BA0
BA0
D7 D_DDR3_BA2
BA2
E6 D_DDR3_ODT
ODT
B13 D_DDR3_A14
A14
B8 D_DDR3_RESET
RST
C15
D_DDR3_BA1
BA1
B15
D_DDR3_A10
A10
C8 D_DDR3_A7
A7
E7 D_DDR3_CKE
CKE
C6 D_DDR3_CSB1
CSB0
A6 D_DDR3_CSB2
CSB1
E8 D_DDR3_A3
A3
D12
D_DDR3_A12
A12
B18 D_DDR3_DM0
DQM[0]
E19 D_DDR3_DQ13
DQ[13]
B25
D_DDR3_DM2
DQM[2]
E26
D_DDR3_DQ29
DQ[29]
C17 D_DDR3_MCLK
MCLK
B16 D_DDR3_MCLKZ
MCLKZ
C22
D_DDR3_DQ0
DQ[0]
C18 D_DDR3_DQ1
DQ[1]
A22 D_DDR3_DQ2
DQ[2]
B19 D_DDR3_DQ5
DQ[5]
C23
D_DDR3_DQ6
DQ[6]
A17 D_DDR3_DQ3
DQ[3]
B23 D_DDR3_DQ4
DQ[4]
C20 D_DDR3_DQ7
DQ[7]
C21
D_DDR3_DQS0
DQS[0]
B21
D_DDR3_DQS0B
DQSB[0]
E18 D_DDR3_DQ15
DQ[15]
E13 D_DDR3_DQ14
DQ[14]
E17
D_DDR3_DQ9
DQ[9]
D16
D_DDR3_DQ8
DQ[8]
D21 D_DDR3_DQ11
DQ[11]
D14 D_DDR3_DQ10
DQ[10]
D18 D_DDR3_DM1
DQM[1]
E14
D_DDR3_DQ12
DQ[12]
E16
D_DDR3_DQS1
DQS[1]
E15 D_DDR3_DQS1B
DQSB[1]
C28 D_DDR3_DQ16
DQ[16]
C25
D_DDR3_DQ17
DQ[17]
C27
D_DDR3_DQ18
DQ[18]
B26 D_DDR3_DQ21
DQ[21]
D27 D_DDR3_DQ22
DQ[22] B24
D_DDR3_DQ19
DQ[19]
E28 AVDD_DDR_2_S
D_DDR3_DQ20
DQ[20]
A27 D_DDR3_DQ23
R450
DQ[23]
B27 D_DDR3_DQS2
DQS[2]
B28 D_DDR3_DQS2B
DQSB[2]
D26
D_DDR3_DQ31
DQ[31]
E21 D_DDR3_DQ30
DQ[30]
D25 D_DDR3_DQ25
DQ[25]
D22 D_DDR3_DQ24
DQ[24]
E27
D_DDR3_DQ27
DQ[27]
E20
D_DDR3_DQ26
DQ[26]
E25 D_DDR3_DM3
DQM[3]
D23 D_DDR3_DQ28
DQ[28]
E24 D_DDR3_DQS3
DQS[3]
E23
D_DDR3_DQS3B
DQSB[3]
AVDD_DDR_2_S
C340 C341 C342 C343 C344 C345 C346 C347 C348
10u/6.3VV 10u/6.3VV 10u/6.3VV 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V
0603
X5R
AVDD_DDR_2_S
C350 C351 C352 C353 C354 C355 C356 C357 C358
100n/16V 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V 100n/16V
4
3
DDR3 4Gb+4Gb 2133MHz
DDR3#1
N60
D_DDR3_DQ0 E3 N3 D_DDR3_A0
DQ0 A0
D_DDR3_DQ1 F7 P7 D_DDR3_A1
DQ1 A1
F2 P3
D_DDR3_DQ2 D_DDR3_A2
DQ2 A2
D_DDR3_DQ3 F8 N2 D_DDR3_A3
DQ3 A3
D_DDR3_DQ4 H3 P8 D_DDR3_A4
DQ4 A4
D_DDR3_DQ5 H8 P2 D_DDR3_A5
DQ5 A5
G2 R8
D_DDR3_DQ6 D_DDR3_A6
DQ6 A6
H7 R2
D_DDR3_DQ7 D_DDR3_A7
DQ7 A7
D_DDR3_DQ8 D7 T8 D_DDR3_A8
DQ8 A8
D_DDR3_DQ9 C3 R3 D_DDR3_A9
DQ9 A9
D_DDR3_DQ10 C8 L7 D_DDR3_A10
DQ10 A10_AP_63
C2 R7
D_DDR3_DQ11 D_DDR3_A11
DQ11 A11
A7 N7
D_DDR3_DQ12 D_DDR3_A12
DQ12 A12_BC#_79
D_DDR3_DQ13 A2
DQ13
D_DDR3_DQ14 B8 J1
DQ14 NC_0
D_DDR3_DQ15 A3 J9
DQ15 NC_1
L1
NC_2
L9
NC_3
D_DDR3_DQS1 C7 M7 D_DDR3_A15
UDQS NC_4
D_DDR3_DQS1B B7 T3 D_DDR3_A13
UDQS#_4 A13
D_DDR3_DQS0 F3 T7 D_DDR3_A14
LDQS A14
G3
D_DDR3_DQS0B
LDQS#_28
D3 M2
D_DDR3_DM1 D_DDR3_BA0_L
UDM BA0
D_DDR3_DM0 E7 N8 D_DDR3_BA1
LDM BA1
M3 D_DDR3_BA2_L
BA2
J7
D_DDR3_MCLK
CK
H1 K7
D-MVREFCA-T1 D_DDR3_MCLKZ
VREFDQ CK#_56
D-MVREFCA-T1 M8 L2 D-CSB1
VREFCA CS#_62
L8 K3 D_DDR3_CASZ
ZQ CAS#_61
D_DDR3_RESET T2 K1 D_DDR3_ODT
RESET#_58 ODT
R444 J3
D_DDR3_RASZ
RAS#_55
L3
D_DDR3_WEZ R445
1% WE#_54
K9 D-DDR3-CKE-T1
240R
AVDD_DDR_2_S CKE
22R
A1 B1
VDDQ_0 VSSQ_0
A8 B9
VDDQ_1 VSSQ_1
C1 D1
VDDQ_2 VSSQ_2
C9 D8
VDDQ_3 VSSQ_3
D2 E2
VDDQ_4 VSSQ_4
E9 E8
VDDQ_5 VSSQ_5
F1 F9
VDDQ_6 VSSQ_6
H2 G1
VDDQ_7 VSSQ_7
H9 G9
VDDQ_8 VSSQ_8
B2 A9
VDD_0 VSS_0
D9 B3
VDD_1 VSS_1
G7 E1
VDD_2 VSS_2
K2 G8
VDD_3 VSS_3
K8 J2
VDD_4 VSS_4
N1 J8
VDD_5 VSS_5
N9 M1
VDD_6 VSS_6
R9 M9
VDD_8 VSS_7
R1 P1
VDD_7 VSS_8
P9
VSS_9
T1
VSS_10
T9
VSS_11
K4B4G1646E-BCNB
1k
D-MVREFCA-T1
1%
AVDD_DDR_2_S AVDD_DDR_2_S
C335
R452
1n/50V
1%
R455
1k
系统无620R 电阻
R454
560R
10k
D-CSB1 D_DDR3_RESET
D-MVREFCA-T1
D-DDR3-CKE-T1
C337 R458 系统无620R 电阻
R460
560R
1n/50V
10k
D-DDR3-CKE-T1
C349
D-CSB1
100n/16V
D_DDR3_A10
D_DDR3_ODT
C359
D_DDR3_A0
100n/16V
D_DDR3_A2
D_DDR3_A13
D_DDR3_A9
D_DDR3_BA1
D_DDR3_A12
D_DDR3_A4
D_DDR3_A6
D_DDR3_A5
D_DDR3_A3
3
2
公版DDR A14、A15均NC，Hisense 只有A15 NC
DDR3#2
N61
D_DDR3_DQ16 E3
DQ0
D_DDR3_DQ17 F7
DQ1
F2
D_DDR3_DQ18
DQ2
D_DDR3_DQ19 F8
DQ3
D_DDR3_DQ20 H3
DQ4
D_DDR3_DQ21 H8
DQ5
G2
D_DDR3_DQ22
DQ6
H7
D_DDR3_DQ23
DQ7
D_DDR3_DQ24 D7
DQ8
D_DDR3_DQ25 C3
DQ9
D_DDR3_DQ26 C8
DQ10 A10_AP_63
C2
D_DDR3_DQ27
DQ11
A7
D_DDR3_DQ28
DQ12 A12_BC#_79
D_DDR3_DQ29 A2
DQ13
D_DDR3_DQ30 B8
DQ14
D_DDR3_DQ31 A3
DQ15
D_DDR3_DQS3 C7
UDQS
D_DDR3_DQS3B B7
UDQS#_4
D_DDR3_DQS2 F3
LDQS
G3
D_DDR3_DQS2B
LDQS#_28
D3
D_DDR3_DM3
UDM
D_DDR3_DM2 E7
LDM
H1
D-MVREFDQ-T2
VREFDQ
D-MVREFDQ-T2 M8
VREFCA
L8
ZQ
D_DDR3_RESET_H T2
RESET#_58
R447
R446
1%
240R
AVDD_DDR_2_S
22R
A1
VDDQ_0
A8
VDDQ_1
C1
VDDQ_2
C9
VDDQ_3
D2
VDDQ_4
E9
VDDQ_5
F1
VDDQ_6
H2
VDDQ_7
H9
VDDQ_8
B2
VDD_0
D9
VDD_1
G7
VDD_2
K2
VDD_3
K8
VDD_4
N1
VDD_5
N9
VDD_6
R9
VDD_8
R1
VDD_7
K4B4G1646E-BCNB
AVDD_DDR_2_S
AVDD_DDR_2_S AVDD_DDR_2_S
R457
系统无620R 电阻
R456
560R
10k
D-CSB2 D_DDR3_RESET_H
C336 D-DDR3-CKE-T2
100n/16V
R459 系统无620R 电阻
R461
560R C338
10k
100n/16V
R462 22R D_DDR3_CKE D_DDR3_CKE R463 22R D-DDR3-CKE-T2
D_DDR3_CSB1 D_DDR3_CSB2 D-CSB2
R465 22R R466 22R
R467 75R D_DDR3_A10_H D_DDR3_A7 R468 75R D_DDR3_A7_H
R469 75R D_DDR3_ODT_H D_DDR3_BA2_L R470 75R D_DDR3_BA2
D_DDR3_BA0_L R471 75R D_DDR3_BA0
75R R472 75R R473
8 1 D_DDR3_A0_H D_DDR3_A8 8 1 D_DDR3_A8_H
7 2 D_DDR3_A2_H D_DDR3_A11 7 2 D_DDR3_A11_H
6 3 D_DDR3_A13_H D_DDR3_A14 6 3 D_DDR3_A14_H
5 4 5 4
D_DDR3_A9_H D_DDR3_A1 D_DDR3_A1_H
75R R474 75R R475
8 1 D_DDR3_BA1_H D_DDR3_A15 8 1 D_DDR3_A15_H
7 2 7 2
D_DDR3_A12_H D_DDR3_RASZ D_DDR3_RASZ_H
6 3 D_DDR3_A4_H D_DDR3_CASZ 6 3 D_DDR3_CASZ_H
5 4 D_DDR3_A6_H D_DDR3_WEZ 5 4 D_DDR3_WEZ_H
75R R476 75R R477
8 1 8 1
7 2 D_DDR3_A5_H D_DDR3_BA0 7 2 D_DDR3_BA0_H
6 3 D_DDR3_A3_H D_DDR3_BA2 6 3 D_DDR3_BA2_H
5 4 5 4
2
1
N3 D_DDR3_A0_H
A0
P7 D_DDR3_A1_H
A1
P3
D_DDR3_A2_H
A2
N2 D_DDR3_A3_H
A3
P8 D_DDR3_A4_H
A4
P2 D_DDR3_A5_H
A5
R8
D_DDR3_A6_H
A6
R2
D_DDR3_A7_H
A7
T8 D_DDR3_A8_H
A8
R3 D_DDR3_A9_H
A9
L7 D_DDR3_A10_H
R7
D_DDR3_A11_H
A11
N7
D_DDR3_A12_H
J1
NC_0
J9
NC_1
L1
NC_2
L9
NC_3
M7 D_DDR3_A15_H
NC_4
T3 D_DDR3_A13_H
A13
T7 D_DDR3_A14_H
A14
M2
D_DDR3_BA0_H
BA0
N8 D_DDR3_BA1_H
BA1
M3 D_DDR3_BA2_H
BA2
J7
D_DDR3_MCLK-1
CK
K7
D_DDR3_MCLKZ-1
CK#_56
L2 D-CSB2
CS#_62
K3 D_DDR3_CASZ_H
CAS#_61
K1 D_DDR3_ODT_H
ODT
J3
D_DDR3_RASZ_H
RAS#_55
L3
D_DDR3_WEZ_H R448 R449
WE#_54
K9 D-DDR3-CKE-T2
CKE
56R
56R
B1
VSSQ_0
B9
VSSQ_1
D1
VSSQ_2
D8
VSSQ_3
E2 C333
VSSQ_4
E8
VSSQ_5 100n/16V
F9
VSSQ_6
G1
VSSQ_7
G9
VSSQ_8
A9
VSS_0
B3
VSS_1
E1
VSS_2
G8
VSS_3
J2
VSS_4
J8
VSS_5
M1
VSS_6
M9
VSS_7
P1
VSS_8
P9
VSS_9
T1
VSS_10
T9
VSS_11
R451 1k
D-MVREFDQ-T2
1%
R453
C334
1%
1k
1n/50V
D-MVREFDQ-T2
C339
1n/50V
D_DDR3_RESET R464 75R D_DDR3_RESET_H
Title Title Title
MSD6886 MSD6886 MSD6886
Size Size Size Document Number Document Number Document Number
Custom Custom Custom DRAM DRAM DRAM
Date: Date: Date: Thursday, September 20, 2018 Thursday, September 20, 2018 Thursday, September 20, 2018 Sheet Sheet Sheet 7 7 7 of of of
1
D
C
B
A
Rev Rev Rev
v1.0 v1.0 v1.0
19 19 19