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VIDEO CD BOARD IC502 M30624MCA-A34FP (CD MECHANISM CONTROLLER)
Pin No.
Pin Name
I/O
1
SENSE
2
SENSE CLK
3
RESOLUTION
4
CHROMA LEVEL
5
DSP CLK
6
TSENS
7
REMOTE IN
8
BYTE
9
CN VSS
10
DSP MUTE
11
CTRL1
12
XRESET
13
XOUT
14
VSS
15
XIN
16
VCC
17
NMI
18
SCOR
19
DSENS
20
CL680 HINT
21
CL680 HSEL
22
DF LATCH
23
CL680 HRDY
24
CL680 RESET
25
H.SYNC IN
26
BGP
27
LPH
28
LD ON
29
12C.CLK
I/O
30
12C.DATA
I/O
31
DATA1O
32
DATA1I
33
CLK1
34
RTS1
35
XVLEVEL.DOWN
36
SUBQ DATA
37
SUBQ CLK
38
P.ON
39
BUS XRDY
40
BUS
41
BUS XHOLD
42, 43
BUS
44
OSD.LANGUAGE
45
VSYNC
46
BUS XWRL
47
LO.BOOST
48
AUDIO MUTE
49
LOAD OUT
50
LOAD IN
51
INSW
48
I
Internal status (SENSE) signal input from the CXD3008Q (IC101)
O
Sense serial data reading clock signal output to the CXD3008Q (IC101)
O
Y resolution output
O
Chroma level output
O
Serial data transfer clock signal output to the CXD3008Q (IC101)
O
Not used (open)
I
Remote control signal input terminal Not used (open)
I
External data bus line byte selection signal input "L": 16 bit, "H": 8 bit (fixed at "L")
—
Ground terminal
O
Muting on/off control signal output to the CXD3008Q (IC101) "H": muting on
O
Clock selection signal output to the CXD3008Q (IC101) "L": 16.9344 MHz (double speed), "H": 33.8688 MHz
Reset signal input from the system controller (IC501) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O
Main system clock output terminal (10 MHz)
—
Ground terminal
I
Main system clock input terminal (10 MHz)
—
Power supply terminal (+5V)
I
Non-maskable interrupt input terminal (fixed at "H" in this set)
I
Subcode sync (S0+S1) detection signal input from the CXD3008Q (IC101)
O
Not used (open)
I
Interrupt request signal input from the MPEG video/audio decoder (IC505)
O
O
Serial data latch pulse output to the D/A converter (IC509) "L" active
—
O
Reset signal output to the MPEG video/audio decoder (IC505) "L": reset
I
Horizontal sync signal input
O
Burst gate pulse signal output
O
AGC hold signal output
O
Laser power selection signal output to the CXA2568M (IC103) "H": laser on
I
2
C clock signal from CD mechanism control (IC501).
I
2
C data signal from CD mechanism control (IC501).
O
Serial data output to the MPEG video/audio decoder (IC506) and D/A converter (IC509)
I
Serial data input from the MPEG video/audio decoder (IC506)
O
Serial data transfer clock signal output to the MPEG video/audio decoder (IC506) and D/A converter (IC509)
O
RTS signal to serial port (check connector).
O
Not used (open)
I
Sub-code Q data input from the CXD3008Q (IC101)
O
Sub-code Q data reading clock signal output to the CXD3008Q (IC101)
O
Power on/off control signal output terminal Not used (open)
I
Ready signal input terminal Not used (fixed at "H")
O
Not used (open)
I
Hold signal input terminal Not used (fixed at "H")
O
Not used (open)
I
OSD language select input terminal "H": English, "L": China
I
Vertical sync signal input
O
Bus write signal output.
O
Not used (open)
O
Audio muting on/off control signal output terminal "L": muting on Not used (open)
O
Loading motor drive signal output terminal Not used (open)
O
Loading motor drive signal output terminal Not used (open)
I
Disc detection (load in) switch input terminal Not used (fixed at "H")
Description
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