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Circuit Diagrams and PWB Layouts
SSB (1080p): PNX8541: Control MIPS
1
2
PNX8541: CONTROL MIPS
B04E
A
EJTAG-TDI
EJTAG-TCK
EJTAG-TMS
EJTAG-TRSTN
EJTAG-TDO
SCL1
B
SDA1
SCL2
SDA2
SCL3
SDA3
+1V2-PNX8541
9HF8
BOOTMODE
CTRL1-MIPS_LCD-PWR-ON
IRQ-PCI
9HF3
IRQ-CA
RXD-MIPS
TXD-MIPS
C
+3V3-PER
3HP8
IRQ-CA
10K
IHF9
BOOTMODE
IRQ-PCI
D
3HPD
SCL1
SCL-UP-MIPS
E
100R
3HPE
SDA1
SDA-UP-MIPS
100R
3HPF
SCL2
SCL-UP-MIPS
100R
3HPG
SDA2
SDA-UP-MIPS
100R
3HPH
SCL3
SCL-SSB
100R
3HPJ
SDA3
SDA-SSB
100R
F
3139 123 6422.1
1
2
Q522.1E LB
3
4
7H00-4
PNX8535
MIPS C0NTROL
AK1
AJ26
TDI
RESET_SYS
AJ2
TCK
IHF6
AK3
AK26
TMS
EJTAG
27MHz_OUT
AJ3
TRST
AK2
TDO
AK27
SCL
AH27
I2C1
SDA
AK29
SCL
AK28
I2C2
SDA
AJ28
SCL
AJ27
I2C3
SDA
AE27
VPP_ID
T1
0
T2
1
T3
2
IHF7
G27
GPIO
3
E27
4
IHF8
D28
5
3HFY
+3V3-PER
10K
3HF1
10K
FHP2
3HPK
SCL-SSB
+3V3-PER
FHP5
2K2
3HPM
SDA-SSB
2K2
SDA-SSB
SCL-SSB
3
4
7.
124
5
6
+3V3-PER
RESET-SYSTEM
RESET-SYSTEM
3HF0
PCI-CLK-OUT
33R
PCI-CLK-OUT
3HFH
IHF0
33R
3HF2
33R
3HF4
33R
7HF1
CY2305S
3HFR
1
PCI-CLK-OUT
33R
+3V3-PER
7HP5
3
PCA9540BDP
VDD
SC0
5
SC1
8
SCL
SD0
1
4
2 C
I
INP
-BUS
SDA
FIL
SD1
2
7
CTRL
VSS
6
5
6
7
8
+3V3-PER
RES
7HF2
PDTC114EU
IHF5
USE WHEN PCI CLK IS DIRECT FROM 8541
PCI-CLK-PNX5050
IHFA
PCI-CLK-PNX8535
IHFB
PCI-CLK-USB20
+3V3-PER
2HF5
10n
2HF6
100n
Φ
VDD
ZERO
2HF7
3
1
DELAY
10p
BUFFER
3HFK
2
PCI-CLK-PNX8535
2
REF
CLK
33R
5
2HF8
15p
3
7
4
8
CLKOUT
3HFM
GND
PCI-CLK-PNX5050
33R
3HFN
PCI-CLK-USB20
33R
FHP3
SCL-SSB-MUX1
FHP4
SCL-SSB-MUX2
FHPA
SDA-SSB-MUX1
FHPB
SDA-SSB-MUX2
RES
9HF1
SDA-SSB-MUX2
RES
9HF2
SCL-SSB-MUX2
7
8
9
2HF2 C1
2HF5 C7
B04E
2HF6 D7
2HF7 D8
2HF8 D8
2HP1 E5
3HF0 B5
A
3HF1 D2
3HF2 C6
3HF3 A6
3HF4 C6
3HF9 A7
3HFH B6
3HFK D8
3HFM E8
3HFN E8
3HFR D6
3HFY D2
3HP8 C1
B
3HPC E7
3HPD E1
3HPE E1
3HPF E1
3HPG E1
3HPH E1
3HPJ F1
3HPK E3
3HPM F3
3HPX E7
3HPY E7
C
3HPZ E6
6HF0 A7
7H00-4 A3
7HF1 D7
RESERVED
7HF2 B7
USE FOR PCI CLK
7HP5 E5
9HF1 F7
9HF2 F7
9HF3 C2
9HF4 C3
9HF8 B2
FHP2 E3
D
FHP3 E7
FHP4 F7
FHP5 F3
FHPA F7
FHPB F7
IHF0 B6
IHF5 B7
IHF6 B4
IHF7 C3
IHF8 C2
IHF9 C2
IHFA C7
E
IHFB C7
F
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