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HP 81106Α PLL/ External Clock for the HP 81 10A
Cloc
k
In
pu
t/
PLL R
efe
r
e
n
ce I
n
put
HP 81106Α
PLL
/
E
xternal Cloc
k M
o
du
le
Th e PLL / Ex tern al
C
lock module can
b
e retrofitted wi thout
recalib rati on.
I
nput imp edance :
50 Ω or 10kΩ selecta
b
l e
Th reshold:
-10
V
to +10
V
Maximum input voltage:
I
np ut transitions:
Inpu t Fre
q
uency:
Minimum
p
ulse widt h:
I
n
p
ut sensitivity:
<300 m
V
pp ty
p
ical
D
elay to
T
RIGG ER
O
UT : 22 ηs ty
p
ical
Period Acc
u
racy:
P
eriod Range:
P
eriod Resolution :
P
erio d RM S-
j
ίtter :
Period Stability:
+15 ν
ς 100 ηs
dc το 150 MHz
3.3 ηs
R
ear
p
anel BN C co nnector used as:
ι
E
xter n al s y stem cl ock input : pul se freque ncy = inpu t
f
re quency
ι or 5 MHz or 10 MHz fr equen cy reference input for internal PLL .
Th e input
f
re quency can b e
m
eas ured.
Ph
ase L oc
k
e
d L
oop
ι
L
ock s ei t her to an external fre que ncy re feren ce at t he Cl ock/ PLL
Ref Input (5 MHz or 10 MHz selectabl e) or to its internal
refere n ce .
ι Hi gh accurac y period (f reque nc y) source . Whe n locked to the
intern al reference,
p
er i od accuracy, range, reso lut ion, and
j
itter are
imp rov ed :
±0 .1%
6.65 ηs to 999 s
4 digits, best case 10 ρ s
0.003% +20 ρs
+50 ppm/γeατ typical
When l ock ed to an external
f
reque ncy reference, t he external
f
re que n cy affects th ese acc uracies .
ι In tern al tri ggering of bursts and
p
attern s: the internal PLL can
replace an external trigger source, while the out put
p
er iod is
determined b y t he
n
orm al internal oscillator.
Specifications
2- 1 3
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