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Mode
I2S
TDM input on X_ADC_D0
TDM input on X_ADC_D1
Figure 5:
TDM input on X_ADC_D2
Analog input
configuration
TDM input on X_ADC_D3
Pin 1 of each jumper is denoted by a triangle on the silkscreen.
The ADC registers are accessed via the I2C bus - see §14.
Board Net
X_ADC_D0
X_ADC_D1
X_ADC_D2
X_ADC_D3
ADC_GPIO
LRCK
Figure 6:
BCLK
Analog input
xCORE GPIO
MCLK_ADC
Notes:
Details of the audio clocking scheme can be found in §11.
7 Analog audio output
A total of eight single-ended analog output channels are provided via four 3.5mm stereo
jacks. The 8 analog outputs are generated by four 2 channel DACs (PCM5122). The DACs
are configured to accept digital audio over I2S or TDM. Configuration of the DACs is via
I2C. The full scale output level is 2.1Vrms.
The four digital input channels ADC_D0 to ADC_D3 are mapped to the xCORE outputs
X_DAC_D0 to X_DAC_D3 through a header array as described in Figure 8. Basic jumper
operation allows configuring the device to work in I2S or TDM mode. In I2S mode, each
wire carries 2 channels of audio so the 8 analog output channels map 1:1 to the four digital
outputs. In TDM mode, a single wire can carry up to 8 channels of data. This means the
four xCORE digital outputs can support up to 32 analog output channels. The jumpers
7
xcore.ai Multichannel Audio Board 1v1 Hardware Manual
Shorting Jumper Position
J6
J9
2-3
2-3
1-2, 3-4
NO FIT
1-2
3-4
1-2
NO FIT
1-2
NO FIT
xCORE GPIO
Port
X1D24
P1I0
X1D25
P1J0
X1D34
P1K0
X1D35
P1L0
X0D33
P4E3
X1D01
P1B0
X1D10
P1C0
See note
NA
J11
J13
2-3
2-3
1-2
NO FIT
1-2
NO FIT
1-2, 3-4
NO FIT
1-2
3-4
Description
Serial data input 0 (I2S or TDM)
Serial data input 1 (I2S or TDM)
Serial data input 2 (I2S or TDM)
Serial data input 3 (I2S or TDM)
Multipurpose interrupt input
Serial left/right frame clock
Bit clock for serial data transfer
Buffered global audio master clock
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