Hardware-Timed Generations - National Instruments PCI-6281 User Manual

Multifunction i/o modules and devices
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Chapter 5
Analog Output

Hardware-Timed Generations

With a hardware-timed generation, a digital hardware signal controls the rate of the generation.
This signal can be generated internally on your device or provided externally.
Hardware-timed generations have several advantages over software-timed acquisitions:
The time between samples can be much shorter.
The timing between samples can be deterministic.
Hardware-timed generations can use hardware triggering.
Hardware-timed operations can be buffered or non-buffered. A buffer is a temporary storage in
computer memory for to-be-generated samples.
Buffered—In a buffered acquisition, data is moved from a PC buffer to the DAQ device's
onboard FIFO using DMA or interrupts for NI PCI/PCIe/PXI/PXIe devices or USB Signal
Streams for USB devices before it is written to the DACs one sample at a time. Buffered
acquisitions typically allow for much faster transfer rates than non-buffered acquisitions
because data is moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The sample mode can be either
finite or continuous:
Finite sample mode generation refers to the generation of a specific, predetermined
number of data samples. Once the specified number of samples has been written out,
the generation stops.
Continuous generation refers to the generation of an unspecified number of samples.
Instead of generating a set number of data samples and stopping, a continuous
generation continues until you stop the operation. There are several different methods
of continuous generation that control what data is written. These methods are
regeneration, FIFO regeneration and non-regeneration modes:
Regeneration is the repetition of the data that is already in the buffer. Standard
regeneration is when data from the PC buffer is continually downloaded to the
FIFO to be written out. New data can be written to the PC buffer at any time
without disrupting the output.
With FIFO regeneration, the entire buffer is downloaded to the FIFO and
regenerated from there. Once the data is downloaded, new data cannot be written
to the FIFO. To use FIFO regeneration, the entire buffer must fit within the FIFO
size. The advantage of using FIFO regeneration is that it does not require
communication with the main host memory once the operation is started, thereby
preventing any problems that may occur due to excessive bus traffic.
With non-regeneration, old data is not repeated. New data must be continually
written to the buffer. If the program does not write new data to the buffer at a fast
enough rate to keep up with the generation, the buffer underflows and causes an
error.
5-4 | ni.com

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