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Table 1-1. Logic Analyzer Connections and Configuration Files
Logic Analyzer
File
Pod6
Pods
Pod4
Pod3
Pod2
Podl
HP 1650A, HP 1650B,
C320C25
--
--
J3
J2
J1
HP 16510A, HP 1652B
STAT
ADDR
DATA
and HP 16510B
clld
HP 16511B Master
D320C25
--
--
--
--
--
(Upper Card)
HP 16511B Expander
--
--
J3
J2
J1
(Lower Card)
STAT
ADDR
DATA
elk
t
HP16541A,D
E320C25
--
J3
J1
Exp. Card 1
*
STAT
DATA
HP16540A,D
J2
MasterCard
ADDR
elk
t
HP1661A,
F320C25
--
J3
--
J2
--
Jl
HP16550A
**
STAT
ADDR
DATA
elk
t
HP1660A
F320C25
--
(Pod 7)
--
J2
--
J1
**
J3
ADDR
DATA
STAT
elk
t
HP 1660A/61A/62A
C320C25
--
J3
J2
J1
STAT
ADDR
DATA
elk
t
HP16542A
E320C25
J3
Exp. Cardl
STAT
HP16542A
J2
MasterCard
ADDR
elk
t
HP16542A
J1
Exp. Card2
DATA
•
For the HP 16541A,D Expander Cards, expansion card 1 is the physically highest HP 16541A,D card (see figure 1-3).
• • This configuration provides 8 k aquisition depth.
Setting Up the HP E2418A
1-10
HP E2418A
TMS32020/C25 Preprocessor Interface
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