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CLD-1010,
2. VCO Free Run Frequency Adjustment
,
DSDC Assembly Adjustment
@ Objective: To optimize the free run frequency for the reference clock for the EFM decoder
© Symptom if the adjustment is inadequate: There is n
sound or the sound is broken.
@Measuring equipment
| ¢ Voltmeter
and tools
®@ Measurement point
¢ DSDC assembly
© IC306 (TLO82CP) (NJMO082D) Pin 1
® Test disc and set
© LDD test disc
@ Adjustment point
¢ DSDC assembly VL301
DSDC assembly
Voltmeter
Connection diagram
Adjustment Procedure
. Mount the LDD test disc. Play it.
H
. Connect the voltmeter to Pin 1 of IC306 (TLO82CP)
of the DSDC assembly and measure the voltage of the :
VCO control signal.
H
. Adjust VL301 of the DSDC assembly so that the vol- :
tage of the VCO control signal at Pin 1 of IC306 is
150 +100mV.
:
105
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