Silicon Laboratories C8051F310DK-T User Manual page 9

C8051F31x
4.3. Expansion I/O Connector (J1)
The 34-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F310 device. Pins for +3 V,
digital ground and the output of an on-board low-pass filter are also available. A small through-hole prototyping area
is also provided. All I/O signals routed to connector J1 are also routed to through-hole connection points between J1
and the prototyping area (see Figure 4 on page 6). Each connection point is labeled indicating the signal available at
the connection point. See Table 2 for a list of pin descriptions for J1.
Pin # Description
1 +3 VD (+3.3 VDC)
2 PWM Output
3
4
5
6
7
8
9
10
11
12
4.4. Target Board DEBUG Interface (J4)
The DEBUG connector (J4) provides access to the DEBUG (C2) pins of the C8051F310. It is used to connect the
Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.
Table 3 shows the DEBUG pin definitions.
8
Table 2. J1 Pin Descriptions
Pin #
13
14
P0.0 15
P0.1 16
P0.2 17
P0.3 18
P0.4 19
P0.5 20
P0.6 21
P0.7 22
P1.0 23
P1.1 24
Table 3. DEBUG Connector Pin Descriptions
Pin #
1 +3 VD (+3.3 VDC)
2, 3, 9
4
5
6
7
8
10
Rev. 0.7
Description Pin #
P1.2 25
P1.3 26
P1.4 27
P1.5 28
P1.6 29
P1.7 30
P2.0 31
P2.1 32
P2.2 33
P2.3 34
P2.4
P2.5
Description
GND (Ground)
C2D
/RST (Reset)
P3.0
C2CK
Not Connected
USB Power
Description
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
/RST (Reset)
GND (Ground)
GND (Ground)