MSI K9N SLI V2 Series Manual page 58

M S-7390 M ainboard
Advance DRAM Configuration
Press <Enter> to enter the sub-menu and the following screen appears.
MCT Timing M ode
This field has the capacity to automatically detect all of the DRAM timing. If you
set this field to [Manual], some fields will appear and selectable.
ROW Cycle Time (TRC)
W hen the M CT Timing M ode sets to [Manual], the field is adjustable. The
rowcycle time determines the minimum number of clock cycles a memory row
takesto complete a full cycle, from row activation up to the precharging of the
activerow.
ROW to ROW Delay (TRRD)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. Specifies
the active-to-active delay of different banks. Time interval between a read and
a precharge command.
RAS# to CAS#Delay (TRCD)
W hen the MCT Timing Mode sets to [Manual], the field is adjustable. W hen
DRAM is refreshed, both rows and columns are addressed separately. This
setup item allows you to determine the timing of the transition from RAS (row
address strobe) to CAS (column address strobe). The less the clock cycles, the
faster the DRAM performance.
CAS# Latency(TCL)
W hen the M CT Timing Mode sets to [Manual], the field is adjustable. This
controls the CAS latency, which determines the timing delay (in clock cycles)
before SDRAM starts a read command after receiving it.
Min RAS# Active Time (TRAS)
W hen the MCT Timing M ode sets to [Manual], this field is adjustable. This
setting determines the time RAS takes to read from and write to memory cell.
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