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3-5-4 Processor and Memory Module Matrix Table
Memory
1 DIMM
2 DIMM
4 DIMM
6 DIMM
8 DIMM
10 DIMM
12 DIMM
NOTE!
l DIMM must be populated in sequential alphabetic order, starting with bank A.
When only one DIMM is used, it must be populated in memory slot C0.
l
Q'ty
F0
E0
D0 C0
V
V
V
V
V
V
System Hardware Installation
CPU0
B0
A0
G0 H0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
- 30 -
I0 J0 K0 L0
V
V
V
V
V
V
V
V
V V
V
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