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Differentiation of IVS develops a current proportional voltage which senses the interloop current flowing into the capacitive
output filter. CC error amplifier A2U2B sums this differentiated innerloop voltage with I-MON and compares the sum to the
CC PROGRAM VOLTAGE to produce CC CONTROL VOLTAGE. In CC mode the CC CONTROL VOLTAGE varies
between about -0.5 Vdc and about +1.0Vdc at the cathode of diode A2CR19. CC clamp A2U2A limits CC PROGRAM
VOLTAGE to about 5.6 peak volts.
Settings of the rear-panel CC programming switches--the B3, B2 and B1 MODE switch settings--allow the CC PROGRAM
VOLTAGE to come from the GPIB board, from an external voltage applied between terminals IP and
P, or from an
external resistor between IP and
P. When using an external resistor, current from the CC constant-current source flows
through the resistance to develop CC PROGRAM VOLTAGE.
Overvoltage Protection (OVP) Circuit
The OVP circuit monitors the power supply output voltage and compares it to a preset limit determined by a front-panel
OVP ADJUST potentiometer. If the output voltage exceeds the limit, the OVP Circuit initiates a PWM OFF pulse, which
also triggers the Down Programmer. The OVP Circuit latches itself until it receives OV CLEAR or ac power is turned off.
The bias voltage detector resets the OVP at turn-on of the unit.
Power-Limit Comparator
Two comparisons with Ip-RAMP VOLTAGE provide POWER LIMIT and CONTROL V LIMIT, two of the four inputs for
the PWM. Power Limit is the output of the Power Limit Comparator A2U14A. The comparator compares Ip-RAMP
VOLTAGE with the power-limit reference voltage of about 1.0Vdc. The reference is adjustable with the POWER LIMIT
calibration trim pot A2R25. POWER LIMIT sets the maximum primary current in power transformer AlT1 by going low
and turning off the PWM when Ip-RAMP VOLTAGE exceeds the reference.
Primary current is approximately proportional to output power, and POWER LIMIT turns off the PWM when the
CONTROL V LIMIT would otherwise allow the unit to deliver more than about 200 watts. This occurs during transient
load increases, step increases in CV PROGRAM VOLTAGE and when the combination of the CV PROGRAM VOLTAGE
and the CC PROGRAM VOLTAGE calls for more than 200 watts. The power-limit comparator produces the power-limited
portion of the unit's output characteristic curve in Figure 4-3 and is the essence of the unit's autoranging characteristic.
Control-Voltage Comparator
The control-voltage comparator A2U16 produces the CONTROL V LIMIT input to the PWM by comparing Ip-RAMP
VOLTAGE to CP CONTROL-VOLTAGE. In CV or CC operation CP is one diode-drop more than the lower of the CV and
CC CONTROL VOLTAGE. CONTROL V LIMIT goes low and turns off the PWM when Ip-RAMP VOLTAGE exceeds
CP. The A2R113-A2R114 voltage divider steers control of CP by its connection at the anodes of series diodes A2CR19 and
A2CR24. The A2R113-A2R114 voltage divider sets the maximum CP voltage to + 1.5Vdc. As an illustration of CV-CC
selection, suppose the unit is in CV operation and diode A2CR24 is forward biased by a low CV CONTROL VOLTAGE:
then CV sets CP to less than + 1.5Vdc. CV keeps diodes A2CR19 reverse biased and prevents CC control until the CC
CONTROL VOLTAGE is even lower.
The lower of the control voltages varies between about - 0.5Vdc and + 1.0Vdc regulating the unit's output. The higher
control voltage has no effect on the output and increases in response to the error voltage in its circuit. When higher, the CC
CONTROL VOLTAGE limits at about 6Vdc. When higher, the CV CONTROL VOLTAGE increases only slightly. In CV
or CC mode CP remains one diode drop more than the lower control voltage and varies from about 0.0 to + 1.5Vdc. In
UNREGULATED mode CP is + 1.0Vdc.
Initial-Ramp Circuit
The control voltage and ramp voltage waveforms in Figure 4-4 show that there is a time delay between when the control
voltage is exceeded and when the PFETS turn off. This cumulative circuit delay causes the PFETS to deliver power even
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Table of Contents
Troubleshooting
